Apparatus and method for sending and receiving broadcast signals

ABSTRACT

A broadcast signal transmitter is disclosed. A broadcast signal transmitter according to the present invention comprises a scrambler for scrambling signaling information; an FEC encoder for FEC encoding the signaling information; a bit interleaver for block interleaving and bit demultiplexing of the signaling information; and a constellation mapper for symbol mapping of the signaling information.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims priority to Provisional Application No.62/085,227 filed on 26 Nov. 2014 in US and Provisional Application No.62/112,134 filed on 4 Feb. 2015 in US, the entire contents of which ishereby incorporated by reference in its entirety.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to an apparatus for transmitting broadcastsignals, an apparatus for receiving broadcast signals and methods fortransmitting and receiving broadcast signals.

2. Discussion of the Related Art

As analog broadcast signal transmission comes to an end, varioustechnologies for transmitting/receiving digital broadcast signals arebeing developed. A digital broadcast signal may include a larger amountof video/audio data than an analog broadcast signal and further includevarious types of additional data in addition to the video/audio data.

That is, a digital broadcast system can provide HD (high definition)images, multi-channel audio and various additional services. However,data transmission efficiency for transmission of large amounts of data,robustness of transmission/reception networks and network flexibility inconsideration of mobile reception equipment need to be improved fordigital broadcast.

SUMMARY OF THE INVENTION

To solve the technical problems above, a broadcast signal transmitterfor processing a broadcast signal including signaling informationaccording to an embodiment of the present invention comprises ascrambler for scrambling the signaling information; a Forward ErrorCorrection (FEC) encoder for FEC encoding the signaling information; abit demultiplexer for block interleaving and bit demultiplexing of thesignaling information; and a constellation mapper for symbol mapping ofthe signaling information, wherein the FEC encoder comprises a BCHencoding/zero inserting unit for BCH encoding the signaling informationand inserting zero bits based on length of the BCH encoded signalinginformation; an LDPC encoding unit for LDPC encoding the signalinginformation and adding parity bits; a parity permutation unit forinterleaving and permutating the parity bits of the LDPC encodedsignaling information; and a parity puncturing/zero removal unit forpuncturing the parity bits of the signaling information and removing thezero bits of the signaling information.

In a broadcast signal transmitter according to an embodiment of thepresent invention, the parity permutation unit splits the interleavedparity bits into at least one bit group unit and permutates the paritybits on the basis of bit group units.

In a broadcast signal transmitter according to an embodiment of thepresent invention, the parity puncturing/zero removal unit punctures apredetermined number of last parity bits of the parity bits.

In a broadcast signal transmitter according to an embodiment of thepresent invention, the BCH encoding/zero inserting unit pads the zerobits according to a shortening pattern order and sequentially maps theBCH encoded signaling information to bit positions which are not paddedwith the zero bits.

In a broadcast signal transmitter according to an embodiment of thepresent invention, in case the number of the BCH encoded bits is lessthan the number of LDPC encoded LDPB information bits, the BCHencoding/zero inserting module fills up the remaining LDPC informationbits by padding the zero bits thereto.

In a broadcast signal transmitter according to an embodiment of thepresent invention, the signaling information includes information forconfiguring physical layer parameters, L1 static information with afixed length, and L1 dynamic information with a variable length.

A method for transmitting a broadcast signal according to the presentinvention comprises scrambling the signaling information; FEC encodingthe signaling information; performing block interleaving and bitdemultiplexing of the signaling information; and performing symbolmapping of the signaling information, wherein the FEC encoding comprisesBCH encoding the signaling information; inserting zero bits according tothe length of the BCH encoded signaling information; adding parity bitsby LDPC encoding the signaling information; and interleaving andpermutating parity bits of the LDPC encoded signaling information; andpuncturing parity bits included in the signaling information andremoving zero bits included in the signaling information.

In a method for transmitting a broadcast signal according to the presentinvention splits the interleaved parity bits into at least one of bitgroup units.

In a method for transmitting a broadcast signal according to the presentinvention, the parity bits split by the bit group units are permutatedon the basis of the bit group units.

In a method for transmitting a broadcast signal according to the presentinvention, a predetermined number of last parity bits among the paritybits are punctured.

In a method for transmitting a broadcast signal according to the presentinvention, the inserting zero bits pads the zero bits according to ashortening pattern order and sequentially maps the BCH encoded signalinginformation to bit positions which are not padded with the zero bits.

In a method for transmitting a broadcast signal according to the presentinvention, in case the number of BCH encoded bits is less than thenumber of LDPC encoded LDPC information bits, the inserting zero bitsfills up the remaining LDPC information bits by padding the zero bitsthereto.

In a method for transmitting a broadcast signal according to the presentinvention, the signaling information includes information forconfiguring physical layer parameters, L1 static information with afixed length, and L1 dynamic information with a variable length.

The present invention can process data according to servicecharacteristics to control QoS (Quality of Services) for each service orservice component, thereby providing various broadcast services.

The present invention can achieve transmission flexibility bytransmitting various broadcast services through the same RF signalbandwidth.

The present invention can improve data transmission efficiency andincrease robustness of transmission/reception of broadcast signals usinga MIMO system.

According to the present invention, it is possible to provide broadcastsignal transmission and reception methods and apparatus capable ofreceiving digital broadcast signals without error even with mobilereception equipment or in an indoor environment.

Further aspects and effects of the present invention will be describedmore detail with embodiments in belows.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates a structure of an apparatus for transmittingbroadcast signals for future broadcast services according to anembodiment of the present invention.

FIG. 2 illustrates an input formatting block according to one embodimentof the present invention.

FIG. 3 illustrates an input formatting block according to anotherembodiment of the present invention.

FIG. 4 illustrates an input formatting block according to anotherembodiment of the present invention.

FIG. 5 illustrates a BICM block according to an embodiment of thepresent invention.

FIG. 6 illustrates a BICM block according to another embodiment of thepresent invention.

FIG. 7 illustrates a frame building block according to one embodiment ofthe present invention.

FIG. 8 illustrates an OFDM generation block according to an embodimentof the present invention.

FIG. 9 illustrates a structure of an apparatus for receiving broadcastsignals for future broadcast services according to an embodiment of thepresent invention.

FIG. 10 illustrates a frame structure according to an embodiment of thepresent invention.

FIG. 11 illustrates a signaling hierarchy structure of the frameaccording to an embodiment of the present invention.

FIG. 12 illustrates preamble signaling data according to an embodimentof the present invention.

FIG. 13 illustrates PLS1 data according to an embodiment of the presentinvention.

FIG. 14 illustrates PLS2 data according to an embodiment of the presentinvention.

FIG. 15 illustrates PLS2 data according to another embodiment of thepresent invention.

FIG. 16 illustrates a logical structure of a frame according to anembodiment of the present invention.

FIG. 17 illustrates PLS mapping according to an embodiment of thepresent invention.

FIG. 18 illustrates EAC mapping according to an embodiment of thepresent invention.

FIG. 19 illustrates FIC mapping according to an embodiment of thepresent invention.

FIG. 20 illustrates a type of DP according to an embodiment of thepresent invention.

FIG. 21 illustrates DP mapping according to an embodiment of the presentinvention.

FIG. 22 illustrates an FEC structure according to an embodiment of thepresent invention.

FIG. 23 illustrates a bit interleaving according to an embodiment of thepresent invention.

FIG. 24 illustrates a cell-word demultiplexing according to anembodiment of the present invention.

FIG. 25 illustrates a time interleaving according to an embodiment ofthe present invention.

FIG. 26 illustrates a basic operation of a twisted row-column blockinterleaver according to an exemplary embodiment of the presentinvention.

FIG. 27 illustrates an operation of a twisted row-column blockinterleaver according to another exemplary embodiment of the presentinvention.

FIG. 28 illustrates a diagonal reading pattern of the twisted row-columnblock interleaver according to the exemplary embodiment of the presentinvention.

FIG. 29 illustrates XFECBLOCK interleaved from each interleaving arrayaccording to an exemplary embodiment of the present invention.

FIG. 30 illustrates building blocks of a broadcast signal transmitterfor processing signaling information according to one embodiment of thepresent invention.

FIG. 31 illustrates an FEC encoding method according to one embodimentof the present invention.

FIG. 32 illustrates an FEC encoding method according to one embodimentof the present invention.

FIG. 33 illustrates a BCH encoding and zero padding method according toone embodiment of the present invention.

FIG. 34 illustrates building blocks of a broadcast signal receiver forprocessing signaling information according to one embodiment of thepresent invention.

FIG. 35 illustrates a method for processing signaling informationincluded in a broadcast signal of a broadcast signal transmitteraccording to one embodiment of the present invention.

FIG. 36 illustrates a method for processing signaling informationincluded in a broadcast signal of a broadcast signal receiver accordingto one embodiment of the present invention.

DETAILED DESCRIPTION OF THE EMBODIMENTS

Reference will now be made in detail to the preferred embodiments of thepresent invention, examples of which are illustrated in the accompanyingdrawings. The detailed description, which will be given below withreference to the accompanying drawings, is intended to explain exemplaryembodiments of the present invention, rather than to show the onlyembodiments that can be implemented according to the present invention.The following detailed description includes specific details in order toprovide a thorough understanding of the present invention. However, itwill be apparent to those skilled in the art that the present inventionmay be practiced without such specific details.

Although most terms used in the present invention have been selectedfrom general ones widely used in the art, some terms have beenarbitrarily selected by the applicant and their meanings are explainedin detail in the following description as needed. Thus, the presentinvention should be understood based upon the intended meanings of theterms rather than their simple names or meanings. Also, the term blockand module are used similarly to indicate logical/functional unit ofparticular signal/data processing.

The present invention provides apparatuses and methods for transmittingand receiving broadcast signals for future broadcast services. Futurebroadcast services according to an embodiment of the present inventioninclude a terrestrial broadcast service, a mobile broadcast service, aUHDTV service, etc. The present invention may process broadcast signalsfor the future broadcast services through non-MIMO (Multiple InputMultiple Output) or MIMO according to one embodiment. A non-MIMO schemeaccording to an embodiment of the present invention may include a MISO(Multiple Input Single Output) scheme, a SISO (Single Input SingleOutput) scheme, etc.

While MISO or MIMO uses two antennas in the following for convenience ofdescription, the present invention is applicable to systems using two ormore antennas.

The present invention may defines three physical layer (PL)profiles—base, handheld and advanced profiles—each optimized to minimizereceiver complexity while attaining the performance required for aparticular use case. The physical layer (PHY) profiles are subsets ofall configurations that a corresponding receiver should implement.

The three PHY profiles share most of the functional blocks but differslightly in specific blocks and/or parameters. Additional PHY profilescan be defined in the future. For the system evolution, future profilescan also be multiplexed with the existing profiles in a single RFchannel through a future extension frame (FEF). The details of each PHYprofile are described below.

1. Base Profile

The base profile represents a main use case for fixed receiving devicesthat are usually connected to a roof-top antenna. The base profile alsoincludes portable devices that could be transported to a place butbelong to a relatively stationary reception category. Use of the baseprofile could be extended to handheld devices or even vehicular by someimproved implementations, but those use cases are not expected for thebase profile receiver operation.

Target SNR range of reception is from approximately to 20 dB, whichincludes the 15 dB SNR reception capability of the existing broadcastsystem (e.g. ATSC A/53). The receiver complexity and power consumptionis not as critical as in the battery-operated handheld devices, whichwill use the handheld profile. Key system parameters for the baseprofile are listed in below table 1.

TABLE 1 LDPC codeword length 16K, 64K bits Constellation size 4~10 bpcu(bits per channel use) Time de-interleaving memory size ≦2¹⁹ data cellsPilot patterns Pilot pattern for fixed reception FFT size 16K, 32Kpoints

2. Handheld Profile

The handheld profile is designed for use in handheld and vehiculardevices that operate with battery power. The devices can be moving withpedestrian or vehicle speed. The power consumption as well as thereceiver complexity is very important for the implementation of thedevices of the handheld profile. The target SNR range of the handheldprofile is approximately 0 to 10 dB, but can be configured to reachbelow 0 dB when intended for deeper indoor reception.

In addition to low SNR capability, resilience to the Doppler Effectcaused by receiver mobility is the most important performance attributeof the handheld profile. Key system parameters for the handheld profileare listed in the below table 2.

TABLE 2 LDPC codeword length 16K bits Constellation size 2~8 bpcu Timede-interleaving memory size ≦2¹⁸ data cells Pilot patterns Pilotpatterns for mobile and indoor reception FFT size 8K, 16K points

3. Advanced Profile

The advanced profile provides highest channel capacity at the cost ofmore implementation complexity. This profile requires using MIMOtransmission and reception, and UHDTV service is a target use case forwhich this profile is specifically designed. The increased capacity canalso be used to allow an increased number of services in a givenbandwidth, e.g., multiple SDTV or HDTV services.

The target SNR range of the advanced profile is approximately 20 to 30dB. MIMO transmission may initially use existing elliptically-polarizedtransmission equipment, with extension to full-power cross-polarizedtransmission in the future. Key system parameters for the advancedprofile are listed in below table 3.

TABLE 3 LDPC codeword length 16K, 64K bits Constellation size 8~12 bpcuTime de-interleaving memory size ≦2¹⁹ data cells Pilot patterns Pilotpattern for fixed reception FFT size 16K, 32K points

In this case, the base profile can be used as a profile for both theterrestrial broadcast service and the mobile broadcast service. That is,the base profile can be used to define a concept of a profile whichincludes the mobile profile. Also, the advanced profile can be dividedadvanced profile for a base profile with MIMO and advanced profile for ahandheld profile with MIMO. Moreover, the three profiles can be changedaccording to intention of the designer.

The following terms and definitions may apply to the present invention.The following terms and definitions can be changed according to design.

auxiliary stream: sequence of cells carrying data of as yet undefinedmodulation and coding, which may be used for future extensions or asrequired by broadcasters or network operators

base data pipe: data pipe that carries service signaling data

baseband frame (or BBFRAME): set of Kbch bits which form the input toone FEC encoding process (BCH and LDPC encoding)

cell: modulation value that is carried by one carrier of the OFDMtransmission

coded block: LDPC-encoded block of PLS1 data or one of the LDPC-encodedblocks of PLS2 data

data pipe: logical channel in the physical layer that carries servicedata or related metadata, which may carry one or multiple service(s) orservice component(s).

data pipe unit: a basic unit for allocating data cells to a DP in aframe.

data symbol: OFDM symbol in a frame which is not a preamble symbol (theframe signaling symbol and frame edge symbol is included in the datasymbol)

DP_ID: this 8-bit field identifies uniquely a DP within the systemidentified by the SYSTEM_ID

dummy cell: cell carrying a pseudo-random value used to fill theremaining capacity not used for PLS signaling, DPs or auxiliary streams

emergency alert channel: part of a frame that carries EAS informationdata

frame: physical layer time slot that starts with a preamble and endswith a frame edge symbol

frame repetition unit: a set of frames belonging to same or differentphysical layer profile including a FEF, which is repeated eight times ina super-frame

fast information channel: a logical channel in a frame that carries themapping information between a service and the corresponding base DP

FECBLOCK: set of LDPC-encoded bits of a DP data

FFT size: nominal FFT size used for a particular mode, equal to theactive symbol period Ts expressed in cycles of the elementary period T

frame signaling symbol: OFDM symbol with higher pilot density used atthe start of a frame in certain combinations of FFT size, guard intervaland scattered pilot (sp) pattern, which carries a part of the PLS data

frame edge symbol: OFDM symbol with higher pilot density used at the endof a frame in certain combinations of FFT size, guard interval andscattered pilot pattern

frame-group: the set of all the frames having the same PHY profile typein a super-frame.

future extension frame: physical layer time slot within the super-framethat could be used for future extension, which starts with a preamble

Futurecast UTB system: proposed physical layer broadcasting system, ofwhich the input is one or more MPEG2-TS or IP or general stream(s) andof which the output is an RF signal

input stream: A stream of data for an ensemble of services delivered tothe end users by the system.

normal data symbol: data symbol excluding the frame signaling symbol andthe frame edge symbol

PHY profile: subset of all configurations that a corresponding receivershould implement

PLS: physical layer signaling data consisting of PLS1 and PLS2

PLS1: a first set of PLS data carried in the FSS symbols having a fixedsize, coding and modulation, which carries basic information about thesystem as well as the parameters needed to decode the PLS2

NOTE: PLS1 data remains constant for the duration of a frame-group.

PLS2: a second set of PLS data transmitted in the FSS symbol, whichcarries more detailed PLS data about the system and the DPs

PLS2 dynamic data: PLS2 data that may dynamically change frame-by-frame

PLS2 static data: PLS2 data that remains static for the duration of aframe-group

preamble signaling data: signaling data carried by the preamble symboland used to identify the basic mode of the system

preamble symbol: fixed-length pilot symbol that carries basic PLS dataand is located in the beginning of a frame

NOTE: The preamble symbol is mainly used for fast initial band scan todetect the system signal, its timing, frequency offset, and FFT-size.

reserved for future use: not defined by the present document but may bedefined in future

super-frame: set of eight frame repetition units

time interleaving block (TI block): set of cells within which timeinterleaving is carried out, corresponding to one use of the timeinterleaver memory

TI group: unit over which dynamic capacity allocation for a particularDP is carried out, made up of an integer, dynamically varying number ofXFECBLOCKs

NOTE: The TI group may be mapped directly to one frame or may be mappedto multiple frames. It may contain one or more TI blocks.

Type 1 DP: DP of a frame where all DPs are mapped into the frame in TDMfashion

Type 2 DP: DP of a frame where all DPs are mapped into the frame in FDMfashion

XFECBLOCK: set of Ncells cells carrying all the bits of one LDPCFECBLOCK

FIG. 1 illustrates a structure of an apparatus for transmittingbroadcast signals for future broadcast services according to anembodiment of the present invention.

The apparatus for transmitting broadcast signals for future broadcastservices according to an embodiment of the present invention can includean input formatting block 1000, a BICM (Bit interleaved coding &modulation) block 1010, a frame structure block 1020, an OFDM(Orthogonal Frequency Division Multiplexing) generation block 1030 and asignaling generation block 1040. A description will be given of theoperation of each module of the apparatus for transmitting broadcastsignals.

IP stream/packets and MPEG2-TS are the main input formats, other streamtypes are handled as General Streams. In addition to these data inputs,Management Information is input to control the scheduling and allocationof the corresponding bandwidth for each input stream. One or multiple TSstream(s), IP stream(s) and/or General Stream(s) inputs aresimultaneously allowed.

The input formatting block 1000 can demultiplex each input stream intoone or multiple data pipe(s), to each of which an independent coding andmodulation is applied. The data pipe (DP) is the basic unit forrobustness control, thereby affecting quality-of-service (QoS). One ormultiple service(s) or service component(s) can be carried by a singleDP. Details of operations of the input formatting block 1000 will bedescribed later.

The data pipe is a logical channel in the physical layer that carriesservice data or related metadata, which may carry one or multipleservice(s) or service component(s).

Also, the data pipe unit: a basic unit for allocating data cells to a DPin a frame.

In the BICM block 1010, parity data is added for error correction andthe encoded bit streams are mapped to complex-value constellationsymbols. The symbols are interleaved across a specific interleavingdepth that is used for the corresponding DP. For the advanced profile,MIMO encoding is performed in the BICM block 1010 and the additionaldata path is added at the output for MIMO transmission. Details ofoperations of the BICM block 1010 will be described later.

The Frame Building block 1020 can map the data cells of the input DPsinto the OFDM symbols within a frame. After mapping, the frequencyinterleaving is used for frequency-domain diversity, especially tocombat frequency-selective fading channels. Details of operations of theFrame Building block 1020 will be described later.

After inserting a preamble at the beginning of each frame, the OFDMGeneration block 1030 can apply conventional OFDM modulation having acyclic prefix as guard interval. For antenna space diversity, adistributed MISO scheme is applied across the transmitters. In addition,a Peak-to-Average Power Reduction (PAPR) scheme is performed in the timedomain. For flexible network planning, this proposal provides a set ofvarious FFT sizes, guard interval lengths and corresponding pilotpatterns. Details of operations of the OFDM Generation block 1030 willbe described later.

The Signaling Generation block 1040 can create physical layer signalinginformation used for the operation of each functional block. Thissignaling information is also transmitted so that the services ofinterest are properly recovered at the receiver side. Details ofoperations of the Signaling Generation block 1040 will be describedlater.

FIGS. 2, 3 and 4 illustrate the input formatting block 1000 according toembodiments of the present invention. A description will be given ofeach figure.

FIG. 2 illustrates an input formatting block according to one embodimentof the present invention. FIG. 2 shows an input formatting module whenthe input signal is a single input stream.

The input formatting block illustrated in FIG. 2 corresponds to anembodiment of the input formatting block 1000 described with referenceto FIG. 1.

The input to the physical layer may be composed of one or multiple datastreams. Each data stream is carried by one DP. The mode adaptationmodules slice the incoming data stream into data fields of the basebandframe (BBF). The system supports three types of input data streams:MPEG2-TS, Internet protocol (IP) and Generic stream (GS). MPEG2-TS ischaracterized by fixed length (188 byte) packets with the first bytebeing a sync-byte (0x47). An IP stream is composed of variable length IPdatagram packets, as signaled within IP packet headers. The systemsupports both IPv4 and IPv6 for the IP stream. GS may be composed ofvariable length packets or constant length packets, signaled withinencapsulation packet headers.

(a) shows a mode adaptation block 2000 and a stream adaptation 2010 forsignal DP and (b) shows a PLS generation block 2020 and a PLS scrambler2030 for generating and processing PLS data. A description will be givenof the operation of each block.

The Input Stream Splitter splits the input TS, IP, GS streams intomultiple service or service component (audio, video, etc.) streams. Themode adaptation module 2010 is comprised of a CRC Encoder, BB (baseband)Frame Slicer, and BB Frame Header Insertion block.

The CRC Encoder provides three kinds of CRC encoding for error detectionat the user packet (UP) level, i.e., CRC-8, CRC-16, and CRC-32. Thecomputed CRC bytes are appended after the UP. CRC-8 is used for TSstream and CRC-32 for IP stream. If the GS stream doesn't provide theCRC encoding, the proposed CRC encoding should be applied.

BB Frame Slicer maps the input into an internal logical-bit format. Thefirst received bit is defined to be the MSB. The BB Frame Slicerallocates a number of input bits equal to the available data fieldcapacity. To allocate a number of input bits equal to the BBF payload,the UP packet stream is sliced to fit the data field of BBF.

BB Frame Header Insertion block can insert fixed length BBF header of 2bytes is inserted in front of the BB Frame. The BBF header is composedof STUFFI (1 bit), SYNCD (13 bits), and RFU (2 bits). In addition to thefixed 2-Byte BBF header, BBF can have an extension field (1 or 3 bytes)at the end of the 2-byte BBF header.

The stream adaptation 2010 is comprised of stuffing insertion block andBB scrambler.

The stuffing insertion block can insert stuffing field into a payload ofa BB frame. If the input data to the stream adaptation is sufficient tofill a BB-Frame, STUFFI is set to ‘0’ and the BBF has no stuffing field.Otherwise STUFFI is set to ‘1’ and the stuffing field is insertedimmediately after the BBF header. The stuffing field comprises two bytesof the stuffing field header and a variable size of stuffing data.

The BB scrambler scrambles complete BBF for energy dispersal. Thescrambling sequence is synchronous with the BBF. The scrambling sequenceis generated by the feed-back shift register.

The PLS generation block 2020 can generate physical layer signaling(PLS) data. The PLS provides the receiver with a means to accessphysical layer DPs. The PLS data consists of PLS1 data and PLS2 data.

The PLS1 data is a first set of PLS data carried in the FSS symbols inthe frame having a fixed size, coding and modulation, which carriesbasic information about the system as well as the parameters needed todecode the PLS2 data. The PLS1 data provides basic transmissionparameters including parameters required to enable the reception anddecoding of the PLS2 data. Also, the PLS1 data remains constant for theduration of a frame-group.

The PLS2 data is a second set of PLS data transmitted in the FSS symbol,which carries more detailed PLS data about the system and the DPs. ThePLS2 contains parameters that provide sufficient information for thereceiver to decode the desired DP. The PLS2 signaling further consistsof two types of parameters, PLS2 Static data (PLS2-STAT data) and PLS2dynamic data (PLS2-DYN data). The PLS2 Static data is PLS2 data thatremains static for the duration of a frame-group and the PLS2 dynamicdata is PLS2 data that may dynamically change frame-by-frame.

Details of the PLS data will be described later.

The PLS scrambler 2030 can scramble the generated PLS data for energydispersal.

The above-described blocks may be omitted or replaced by blocks havingsimilar or identical functions.

FIG. 3 illustrates an input formatting block according to anotherembodiment of the present invention.

The input formatting block illustrated in FIG. 3 corresponds to anembodiment of the input formatting block 1000 described with referenceto FIG. 1.

FIG. 3 shows a mode adaptation block of the input formatting block whenthe input signal corresponds to multiple input streams.

The mode adaptation block of the input formatting block for processingthe multiple input streams can independently process the multiple inputstreams.

Referring to FIG. 3, the mode adaptation block for respectivelyprocessing the multiple input streams can include an input streamsplitter 3000, an input stream synchronizer 3010, a compensating delayblock 3020, a null packet deletion block 3030, a head compression block3040, a CRC encoder 3050, a BB frame slicer 3060 and a BB headerinsertion block 3070. Description will be given of each block of themode adaptation block.

Operations of the CRC encoder 3050, BB frame slicer 3060 and BB headerinsertion block 3070 correspond to those of the CRC encoder, BB frameslicer and BB header insertion block described with reference to FIG. 2and thus description thereof is omitted.

The input stream splitter 3000 can split the input TS, IP, GS streamsinto multiple service or service component (audio, video, etc.) streams.

The input stream synchronizer 3010 may be referred as ISSY. The ISSY canprovide suitable means to guarantee Constant Bit Rate (CBR) and constantend-to-end transmission delay for any input data format. The ISSY isalways used for the case of multiple DPs carrying TS, and optionallyused for multiple DPs carrying GS streams.

The compensating delay block 3020 can delay the split TS packet streamfollowing the insertion of ISSY information to allow a TS packetrecombining mechanism without requiring additional memory in thereceiver.

The null packet deletion block 3030, is used only for the TS inputstream case. Some TS input streams or split TS streams may have a largenumber of null-packets present in order to accommodate VBR (variablebit-rate) services in a CBR TS stream. In this case, in order to avoidunnecessary transmission overhead, null-packets can be identified andnot transmitted. In the receiver, removed null-packets can bere-inserted in the exact place where they were originally by referenceto a deleted null-packet (DNP) counter that is inserted in thetransmission, thus guaranteeing constant bit-rate and avoiding the needfor time-stamp (PCR) updating.

The head compression block 3040 can provide packet header compression toincrease transmission efficiency for TS or IP input streams. Because thereceiver can have a priori information on certain parts of the header,this known information can be deleted in the transmitter.

For Transport Stream, the receiver has a-priori information about thesync-byte configuration (0x47) and the packet length (188 Byte). If theinput TS stream carries content that has only one PID, i.e., for onlyone service component (video, audio, etc.) or service sub-component (SVCbase layer, SVC enhancement layer, MVC base view or MVC dependentviews), TS packet header compression can be applied (optionally) to theTransport Stream. IP packet header compression is used optionally if theinput steam is an IP stream.

The above-described blocks may be omitted or replaced by blocks havingsimilar or identical functions.

FIG. 4 illustrates an input formatting block according to anotherembodiment of the present invention.

The input formatting block illustrated in FIG. 4 corresponds to anembodiment of the input formatting block 1000 described with referenceto FIG. 1.

FIG. 4 illustrates a stream adaptation block of the input formattingmodule when the input signal corresponds to multiple input streams.

Referring to FIG. 4, the mode adaptation block for respectivelyprocessing the multiple input streams can include a scheduler 4000, an1-Frame delay block 4010, a stuffing insertion block 4020, an in-bandsignaling 4030, a BB Frame scrambler 4040, a PLS generation block 4050and a PLS scrambler 4060. Description will be given of each block of thestream adaptation block.

Operations of the stuffing insertion block 4020, the BB Frame scrambler4040, the PLS generation block 4050 and the PLS scrambler 4060correspond to those of the stuffing insertion block, BB scrambler, PLSgeneration block and the PLS scrambler described with reference to FIG.2 and thus description thereof is omitted.

The scheduler 4000 can determine the overall cell allocation across theentire frame from the amount of FECBLOCKs of each DP. Including theallocation for PLS, EAC and FIC, the scheduler generate the values ofPLS2-DYN data, which is transmitted as in-band signaling or PLS cell inFSS of the frame. Details of FECBLOCK, EAC and FIC will be describedlater.

The 1-Frame delay block 4010 can delay the input data by onetransmission frame such that scheduling information about the next framecan be transmitted through the current frame for in-band signalinginformation to be inserted into the DPs.

The in-band signaling 4030 can insert un-delayed part of the PLS2 datainto a DP of a frame.

The above-described blocks may be omitted or replaced by blocks havingsimilar or identical functions.

FIG. 5 illustrates a BICM block according to an embodiment of thepresent invention.

The BICM block illustrated in FIG. 5 corresponds to an embodiment of theBICM block 1010 described with reference to FIG. 1.

As described above, the apparatus for transmitting broadcast signals forfuture broadcast services according to an embodiment of the presentinvention can provide a terrestrial broadcast service, mobile broadcastservice, UHDTV service, etc.

Since QoS (quality of service) depends on characteristics of a serviceprovided by the apparatus for transmitting broadcast signals for futurebroadcast services according to an embodiment of the present invention,data corresponding to respective services needs to be processed throughdifferent schemes. Accordingly, the a BICM block according to anembodiment of the present invention can independently process DPs inputthereto by independently applying SISO, MISO and MIMO schemes to thedata pipes respectively corresponding to data paths. Consequently, theapparatus for transmitting broadcast signals for future broadcastservices according to an embodiment of the present invention can controlQoS for each service or service component transmitted through each DP.

(a) shows the BICM block shared by the base profile and the handheldprofile and (b) shows the BICM block of the advanced profile.

The BICM block shared by the base profile and the handheld profile andthe BICM block of the advanced profile can include plural processingblocks for processing each DP.

A description will be given of each processing block of the BICM blockfor the base profile and the handheld profile and the BICM block for theadvanced profile.

A processing block 5000 of the BICM block for the base profile and thehandheld profile can include a Data FEC encoder 5010, a bit interleaver5020, a constellation mapper 5030, an SSD (Signal Space Diversity)encoding block 5040 and a time interleaver 5050.

The Data FEC encoder 5010 can perform the FEC encoding on the input BBFto generate FECBLOCK procedure using outer coding (BCH), and innercoding (LDPC). The outer coding (BCH) is optional coding method. Detailsof operations of the Data FEC encoder 5010 will be described later.

The bit interleaver 5020 can interleave outputs of the Data FEC encoder5010 to achieve optimized performance with combination of the LDPC codesand modulation scheme while providing an efficiently implementablestructure. Details of operations of the bit interleaver 5020 will bedescribed later.

The constellation mapper 5030 can modulate each cell word from the bitinterleaver 5020 in the base and the handheld profiles, or cell wordfrom the Cell-word demultiplexer 5010-1 in the advanced profile usingeither QPSK, QAM-16, non-uniform QAM (NUQ-64, NUQ-256, NUQ-1024) ornon-uniform constellation (NUC-16, NUC-64, NUC-256, NUC-1024) to give apower-normalized constellation point, el. This constellation mapping isapplied only for DPs. Observe that QAM-16 and NUQs are square shaped,while NUCs have arbitrary shape. When each constellation is rotated byany multiple of 90 degrees, the rotated constellation exactly overlapswith its original one. This “rotation-sense” symmetric property makesthe capacities and the average powers of the real and imaginarycomponents equal to each other. Both NUQs and NUCs are definedspecifically for each code rate and the particular one used is signaledby the parameter DP_MOD filed in PLS2 data.

The SSD encoding block 5040 can precode cells in two (2D), three (3D),and four (4D) dimensions to increase the reception robustness underdifficult fading conditions.

The time interleaver 5050 can operates at the DP level. The parametersof time interleaving (TI) may be set differently for each DP. Details ofoperations of the time interleaver 5050 will be described later.

A processing block 5000-1 of the BICM block for the advanced profile caninclude the Data FEC encoder, bit interleaver, constellation mapper, andtime interleaver. However, the processing block 5000-1 is distinguishedfrom the processing block 5000 further includes a cell-worddemultiplexer 5010-1 and a MIMO encoding block 5020-1.

Also, the operations of the Data FEC encoder, bit interleaver,constellation mapper, and time interleaver in the processing block5000-1 correspond to those of the Data FEC encoder 5010, bit interleaver5020, constellation mapper 5030, and time interleaver 5050 described andthus description thereof is omitted.

The cell-word demultiplexer 5010-1 is used for the DP of the advancedprofile to divide the single cell-word stream into dual cell-wordstreams for MIMO processing. Details of operations of the cell-worddemultiplexer 5010-1 will be described later.

The MIMO encoding block 5020-1 can processing the output of thecell-word demultiplexer 5010-1 using MIMO encoding scheme. The MIMOencoding scheme was optimized for broadcasting signal transmission. TheMIMO technology is a promising way to get a capacity increase but itdepends on channel characteristics. Especially for broadcasting, thestrong LOS component of the channel or a difference in the receivedsignal power between two antennas caused by different signal propagationcharacteristics makes it difficult to get capacity gain from MIMO. Theproposed MIMO encoding scheme overcomes this problem using arotation-based pre-coding and phase randomization of one of the MIMOoutput signals.

MIMO encoding is intended for a 2×2 MIMO system requiring at least twoantennas at both the transmitter and the receiver. Two MIMO encodingmodes are defined in this proposal; full-rate spatial multiplexing(FR-SM) and full-rate full-diversity spatial multiplexing (FRFD-SM). TheFR-SM encoding provides capacity increase with relatively smallcomplexity increase at the receiver side while the FRFD-SM encodingprovides capacity increase and additional diversity gain with a greatcomplexity increase at the receiver side. The proposed MIMO encodingscheme has no restriction on the antenna polarity configuration.

MIMO processing is required for the advanced profile frame, which meansall DPs in the advanced profile frame are processed by the MIMO encoder.MIMO processing is applied at DP level. Pairs of the ConstellationMapper outputs NUQ (e1,i and e2,i) are fed to the input of the MIMOEncoder. Paired MIMO Encoder output (g1,i and g2,i) is transmitted bythe same carrier k and OFDM symbol 1 of their respective TX antennas.

The above-described blocks may be omitted or replaced by blocks havingsimilar or identical functions.

FIG. 6 illustrates a BICM block according to another embodiment of thepresent invention.

The BICM block illustrated in FIG. 6 corresponds to an embodiment of theBICM block 1010 described with reference to FIG. 1.

FIG. 6 illustrates a BICM block for protection of physical layersignaling (PLS), emergency alert channel (EAC) and fast informationchannel (FIC). EAC is a part of a frame that carries EAS informationdata and FIC is a logical channel in a frame that carries the mappinginformation between a service and the corresponding base DP. Details ofthe EAC and FIC will be described later.

Referring to FIG. 6, the BICM block for protection of PLS, EAC and FICcan include a PLS FEC encoder 6000, a bit interleaver 6010, aconstellation mapper 6020 and time interleaver 6030.

Also, the PLS FEC encoder 6000 can include a scrambler, BCHencoding/zero insertion block, LDPC encoding block and LDPC paritypunturing block. Description will be given of each block of the BICMblock.

The PLS FEC encoder 6000 can encode the scrambled PLS 1/2 data, EAC andFIC section.

The scrambler can scramble PLS1 data and PLS2 data before BCH encodingand shortened and punctured LDPC encoding.

The BCH encoding/zero insertion block can perform outer encoding on thescrambled PLS 1/2 data using the shortened BCH code for PLS protectionand insert zero bits after the BCH encoding. For PLS1 data only, theoutput bits of the zero insertion may be permutted before LDPC encoding.

The LDPC encoding block can encode the output of the BCH encoding/zeroinsertion block using LDPC code. To generate a complete coded block,Cldpc, parity bits, Pldpc are encoded systematically from eachzero-inserted PLS information block, Ildpc and appended after it.

C _(ldpc) =[I _(ldpc) P _(ldpc) ]=[i ₀ ,i ₁ , . . . , i _(K) _(ldpc) ⁻¹, p ₀ ,p ₁ , . . . , p _(N) _(ldpc) _(−K) _(ldpc) ⁻¹]  [Equation 1]

The LDPC code parameters for PLS1 and PLS2 are as following table 4.

TABLE 4 Signaling Kldpc code Type Ksig Kbch Nbch_parity (=Nbch) NldpcNldpc_parity rate Qldpc PLS1 342 1020 60 1080 4320 3240 1/4  36 PLS2<1021 >1020 2100 2160 7200 5040 3/10 56

The LDPC parity punturing block can perform puncturing on the PLS1 dataand PLS 2 data.

When shortening is applied to the PLS1 data protection, some LDPC paritybits are punctured after LDPC encoding. Also, for the PLS2 dataprotection, the LDPC parity bits of PLS2 are punctured after LDPCencoding. These punctured bits are not transmitted.

The bit interleaver 6010 can interleave the each shortened and puncturedPLS1 data and PLS2 data.

The constellation mapper 6020 can map the bit interleaved PLS1 data andPLS2 data onto constellations.

The time interleaver 6030 can interleave the mapped PLS1 data and PLS2data.

The above-described blocks may be omitted or replaced by blocks havingsimilar or identical functions.

FIG. 7 illustrates a frame building block according to one embodiment ofthe present invention.

The frame building block illustrated in FIG. 7 corresponds to anembodiment of the frame building block 1020 described with reference toFIG. 1.

Referring to FIG. 7, the frame building block can include a delaycompensation block 7000, a cell mapper 7010 and a frequency interleaver7020. Description will be given of each block of the frame buildingblock.

The delay compensation block 7000 can adjust the timing between the datapipes and the corresponding PLS data to ensure that they are co-timed atthe transmitter end. The PLS data is delayed by the same amount as datapipes are by addressing the delays of data pipes caused by the InputFormatting block and BICM block. The delay of the BICM block is mainlydue to the time interleaver 5050. In-band signaling data carriesinformation of the next TI group so that they are carried one frameahead of the DPs to be signaled. The Delay Compensating block delaysin-band signaling data accordingly.

The cell mapper 7010 can map PLS, EAC, FIC, DPs, auxiliary streams anddummy cells into the active carriers of the OFDM symbols in the frame.The basic function of the cell mapper 7010 is to map data cells producedby the TIs for each of the DPs, PLS cells, and EAC/FIC cells, if any,into arrays of active OFDM cells corresponding to each of the OFDMsymbols within a frame. Service signaling data (such as PSI (programspecific information)/SI) can be separately gathered and sent by a datapipe. The Cell Mapper operates according to the dynamic informationproduced by the scheduler and the configuration of the frame structure.Details of the frame will be described later.

The frequency interleaver 7020 can randomly interleave data cellsreceived from the cell mapper 7010 to provide frequency diversity. Also,the frequency interleaver 7020 can operate on very OFDM symbol paircomprised of two sequential OFDM symbols using a differentinterleaving-seed order to get maximum interleaving gain in a singleframe. Details of operations of the frequency interleaver 7020 will bedescribed later.

The above-described blocks may be omitted or replaced by blocks havingsimilar or identical functions.

FIG. 8 illustrates an OFMD generation block according to an embodimentof the present invention.

The OFMD generation block illustrated in FIG. 8 corresponds to anembodiment of the OFMD generation block 1030 described with reference toFIG. 1.

The OFDM generation block modulates the OFDM carriers by the cellsproduced by the Frame Building block, inserts the pilots, and producesthe time domain signal for transmission. Also, this block subsequentlyinserts guard intervals, and applies PAPR (Peak-to-Average Power Radio)reduction processing to produce the final RF signal.

Referring to FIG. 8, the frame building block can include a pilot andreserved tone insertion block 8000, a 2D-eSFN encoding block 8010, anIFFT (Inverse Fast Fourier Transform) block 8020, a PAPR reduction block8030, a guard interval insertion block 8040, a preamble insertion block8050, other system insertion block 8060 and a DAC block 8070.Description will be given of each block of the frame building block.

The pilot and reserved tone insertion block 8000 can insert pilots andthe reserved tone.

Various cells within the OFDM symbol are modulated with referenceinformation, known as pilots, which have transmitted values known apriori in the receiver. The information of pilot cells is made up ofscattered pilots (SP), continual pilots (CP), edge pilots (EP), FSS(frame signaling symbol) pilots and FES (frame edge symbol) pilots. Eachpilot is transmitted at a particular boosted power level according topilot type and pilot pattern. The value of the pilot information isderived from a reference sequence, which is a series of values, one foreach transmitted carrier on any given symbol. The pilots can be used forframe synchronization, frequency synchronization, time synchronization,channel estimation, and transmission mode identification, and also canbe used to follow the phase noise.

Reference information, taken from the reference sequence, is transmittedin scattered pilot cells in every symbol except the preamble, FSS andFES of the frame. Continual pilots are inserted in every symbol of theframe. The number and location of continual pilots depends on both theFFT size and the scattered pilot pattern. The edge carriers are edgepilots in every symbol except for the preamble symbol. They are insertedin order to allow frequency interpolation up to the edge of thespectrum. FSS pilots are inserted in FSS(s) and FES pilots are insertedin FES. They are inserted in order to allow time interpolation up to theedge of the frame.

The system according to an embodiment of the present invention supportsthe SFN network, where distributed MISO scheme is optionally used tosupport very robust transmission mode. The 2D-eSFN is a distributed MISOscheme that uses multiple TX antennas, each of which is located in thedifferent transmitter site in the SFN network.

The 2D-eSFN encoding block 8010 can process a 2D-eSFN processing todistorts the phase of the signals transmitted from multipletransmitters, in order to create both time and frequency diversity inthe SFN configuration. Hence, burst errors due to low flat fading ordeep-fading for a long time can be mitigated.

The IFFT block 8020 can modulate the output from the 2D-eSFN encodingblock 8010 using OFDM modulation scheme. Any cell in the data symbolswhich has not been designated as a pilot (or as a reserved tone) carriesone of the data cells from the frequency interleaver. The cells aremapped to OFDM carriers.

The PAPR reduction block 8030 can perform a PAPR reduction on inputsignal using various PAPR reduction algorithm in the time domain.

The guard interval insertion block 8040 can insert guard intervals andthe preamble insertion block 8050 can insert preamble in front of thesignal. Details of a structure of the preamble will be described later.The other system insertion block 8060 can multiplex signals of aplurality of broadcast transmission/reception systems in the time domainsuch that data of two or more different broadcast transmission/receptionsystems providing broadcast services can be simultaneously transmittedin the same RF signal bandwidth. In this case, the two or more differentbroadcast transmission/reception systems refer to systems providingdifferent broadcast services. The different broadcast services may referto a terrestrial broadcast service, mobile broadcast service, etc. Datarelated to respective broadcast services can be transmitted throughdifferent frames.

The DAC block 8070 can convert an input digital signal into an analogsignal and output the analog signal. The signal output from the DACblock 7800 can be transmitted through multiple output antennas accordingto the physical layer profiles. A Tx antenna according to an embodimentof the present invention can have vertical or horizontal polarity.

The above-described blocks may be omitted or replaced by blocks havingsimilar or identical functions according to design.

FIG. 9 illustrates a structure of an apparatus for receiving broadcastsignals for future broadcast services according to an embodiment of thepresent invention.

The apparatus for receiving broadcast signals for future broadcastservices according to an embodiment of the present invention cancorrespond to the apparatus for transmitting broadcast signals forfuture broadcast services, described with reference to FIG. 1.

The apparatus for receiving broadcast signals for future broadcastservices according to an embodiment of the present invention can includea synchronization & demodulation module 9000, a frame parsing module9010, a demapping & decoding module 9020, an output processor 9030 and asignaling decoding module 9040. A description will be given of operationof each module of the apparatus for receiving broadcast signals.

The synchronization & demodulation module 9000 can receive input signalsthrough m Rx antennas, perform signal detection and synchronization withrespect to a system corresponding to the apparatus for receivingbroadcast signals and carry out demodulation corresponding to a reverseprocedure of the procedure performed by the apparatus for transmittingbroadcast signals.

The frame parsing module 9010 can parse input signal frames and extractdata through which a service selected by a user is transmitted. If theapparatus for transmitting broadcast signals performs interleaving, theframe parsing module 9010 can carry out deinterleaving corresponding toa reverse procedure of interleaving. In this case, the positions of asignal and data that need to be extracted can be obtained by decodingdata output from the signaling decoding module 9400 to restorescheduling information generated by the apparatus for transmittingbroadcast signals.

The demapping & decoding module 9020 can convert the input signals intobit domain data and then deinterleave the same as necessary. Thedemapping & decoding module 9200 can perform demapping for mappingapplied for transmission efficiency and correct an error generated on atransmission channel through decoding. In this case, the demapping &decoding module 9020 can obtain transmission parameters necessary fordemapping and decoding by decoding the data output from the signalingdecoding module 9040.

The output processor 9030 can perform reverse procedures of variouscompression/signal processing procedures which are applied by theapparatus for transmitting broadcast signals to improve transmissionefficiency. In this case, the output processor 9030 can acquirenecessary control information from data output from the signalingdecoding module 9040. The output of the output processor 9030corresponds to a signal input to the apparatus for transmittingbroadcast signals and may be MPEG-TSs, IP streams (v4 or v6) and genericstreams.

The signaling decoding module 9040 can obtain PLS information from thesignal demodulated by the synchronization & demodulation module 9000. Asdescribed above, the frame parsing module 9010, demapping & decodingmodule 9020 and output processor 9030 can execute functions thereofusing the data output from the signaling decoding module 9040.

FIG. 10 illustrates a frame structure according to an embodiment of thepresent invention.

FIG. 10 shows an example configuration of the frame types and FRUs in asuper-frame. (a) shows a super frame according to an embodiment of thepresent invention, (b) shows FRU (Frame Repetition Unit) according to anembodiment of the present invention, (c) shows frames of variable PHYprofiles in the FRU and (d) shows a structure of a frame.

A super-frame may be composed of eight FRUs. The FRU is a basicmultiplexing unit for TDM of the frames, and is repeated eight times ina super-frame.

Each frame in the FRU belongs to one of the PHY profiles, (base,handheld, advanced) or FEF. The maximum allowed number of the frames inthe FRU is four and a given PHY profile can appear any number of timesfrom zero times to four times in the FRU (e.g., base, base, handheld,advanced). PHY profile definitions can be extended using reserved valuesof the PHY_PROFILE in the preamble, if required.

The FEF part is inserted at the end of the FRU, if included. When theFEF is included in the FRU, the minimum number of FEFs is 8 in asuper-frame. It is not recommended that FEF parts be adjacent to eachother.

One frame is further divided into a number of OFDM symbols and apreamble. As shown in (d), the frame comprises a preamble, one or moreframe signaling symbols (FSS), normal data symbols and a frame edgesymbol (FES).

The preamble is a special symbol that enables fast Futurecast UTB systemsignal detection and provides a set of basic transmission parameters forefficient transmission and reception of the signal. The detaileddescription of the preamble will be will be described later.

The main purpose of the FSS(s) is to carry the PLS data. For fastsynchronization and channel estimation, and hence fast decoding of PLSdata, the FSS has more dense pilot pattern than the normal data symbol.The FES has exactly the same pilots as the FSS, which enablesfrequency-only interpolation within the FES and temporal interpolation,without extrapolation, for symbols immediately preceding the FES.

FIG. 11 illustrates a signaling hierarchy structure of the frameaccording to an embodiment of the present invention.

FIG. 11 illustrates the signaling hierarchy structure, which is splitinto three main parts: the preamble signaling data 11000, the PLS1 data11010 and the PLS2 data 11020. The purpose of the preamble, which iscarried by the preamble symbol in every frame, is to indicate thetransmission type and basic transmission parameters of that frame. ThePLS1 enables the receiver to access and decode the PLS2 data, whichcontains the parameters to access the DP of interest. The PLS2 iscarried in every frame and split into two main parts: PLS2-STAT data andPLS2-DYN data. The static and dynamic portion of PLS2 data is followedby padding, if necessary.

FIG. 12 illustrates preamble signaling data according to an embodimentof the present invention.

Preamble signaling data carries 21 bits of information that are neededto enable the receiver to access PLS data and trace DPs within the framestructure. Details of the preamble signaling data are as follows:

PHY_PROFILE: This 3-bit field indicates the PHY profile type of thecurrent frame. The mapping of different PHY profile types is given inbelow table 5.

TABLE 5 Value PHY profile 000 Base profile 001 Handheld profile 010Advanced profiled 011~110 Reserved 111 FEF

FFT_SIZE: This 2 bit field indicates the FFT size of the current framewithin a frame-group, as described in below table 6.

TABLE 6 Value FFT size 00  8K FFT 01 16K FFT 10 32K FFT 11 Reserved

GI_FRACTION: This 3 bit field indicates the guard interval fractionvalue in the current super-frame, as described in below table 7.

TABLE 7 Value GI_FRACTION 000 1/5   001 1/10  010 1/20  011 1/40  1001/80  101 1/160 110~111 Reserved

EAC_FLAG: This 1 bit field indicates whether the EAC is provided in thecurrent frame. If this field is set to ‘1’, emergency alert service(EAS) is provided in the current frame. If this field set to ‘0’, EAS isnot carried in the current frame. This field can be switched dynamicallywithin a super-frame.

PILOT_MODE: This 1-bit field indicates whether the pilot mode is mobilemode or fixed mode for the current frame in the current frame-group. Ifthis field is set to ‘0’, mobile pilot mode is used. If the field is setto ‘1’, the fixed pilot mode is used.

PAPR_FLAG: This 1-bit field indicates whether PAPR reduction is used forthe current frame in the current frame-group. If this field is set tovalue ‘1’, tone reservation is used for PAPR reduction. If this field isset to ‘0’, PAPR reduction is not used.

FRU_CONFIGURE: This 3-bit field indicates the PHY profile typeconfigurations of the frame repetition units (FRU) that are present inthe current super-frame. All profile types conveyed in the currentsuper-frame are identified in this field in all preambles in the currentsuper-frame. The 3-bit field has a different definition for eachprofile, as show in below table 8.

TABLE 8 Current Current Current Current PHY_PROFILE = PHY_PROFILE =PHY_PROFILE = PHY_PROFILE = ‘000’ ‘001’ ‘010’ ‘111’ (base) (handheld)(advanced) (FEF) FRU_CONFIGURE = Only base Only Only Only FEF 000profile handheld advanced present present profile profile presentpresent FRU_CONFIGURE = Handheld Base Base Base lXX profile profileprofile profile present present present present FRU_CONFIGURE = AdvancedAdvanced Handheld Handheld XlX profile profile profile profile presentpresent present present FRU_CONFIGURE = FEF FEF FEF Advanced XX1 presentpresent present profile present

RESERVED: This 7-bit field is reserved for future use.

FIG. 13 illustrates PLS1 data according to an embodiment of the presentinvention.

PLS1 data provides basic transmission parameters including parametersrequired to enable the reception and decoding of the PLS2. As abovementioned, the PLS1 data remain unchanged for the entire duration of oneframe-group. The detailed definition of the signaling fields of the PLS1data are as follows:

PREAMBLE_DATA: This 20-bit field is a copy of the preamble signalingdata excluding the EAC_FLAG.

NUM_FRAME_FRU: This 2-bit field indicates the number of the frames perFRU.

PAYLOAD_TYPE: This 3-bit field indicates the format of the payload datacarried in the frame-group. PAYLOAD_TYPE is signaled as shown in table9.

TABE 9 Value Payload type 1XX TS stream is transmitted X1X IP stream istransmitted XX1 GS stream is transmitted

NUM_FSS: This 2-bit field indicates the number of FSS symbols in thecurrent frame.

SYSTEM_VERSION: This 8-bit field indicates the version of thetransmitted signal format. The SYSTEM_VERSION is divided into two 4-bitfields, which are a major version and a minor version.

Major version: The MSB four bits of SYSTEM_VERSION field indicate majorversion information. A change in the major version field indicates anon-backward-compatible change. The default value is ‘0000’. For theversion described in this standard, the value is set to ‘0000’.

Minor version: The LSB four bits of SYSTEM_VERSION field indicate minorversion information. A change in the minor version field isbackward-compatible.

CELL_ID: This is a 16-bit field which uniquely identifies a geographiccell in an ATSC network. An ATSC cell coverage area may consist of oneor more frequencies, depending on the number of frequencies used perFuturecast UTB system. If the value of the CELL_ID is not known orunspecified, this field is set to ‘0’.

NETWORK_ID: This is a 16-bit field which uniquely identifies the currentATSC network.

SYSTEM_ID: This 16-bit field uniquely identifies the Futurecast UTBsystem within the ATSC network. The Futurecast UTB system is theterrestrial broadcast system whose input is one or more input streams(TS, IP, GS) and whose output is an RF signal. The Futurecast UTB systemcarries one or more PHY profiles and FEF, if any. The same FuturecastUTB system may carry different input streams and use different RFfrequencies in different geographical areas, allowing local serviceinsertion. The frame structure and scheduling is controlled in one placeand is identical for all transmissions within a Futurecast UTB system.One or more Futurecast UTB systems may have the same SYSTEM_ID meaningthat they all have the same physical layer structure and configuration.

The following loop consists of FRU_PHY_PROFILE, FRU_FRAME_LENGTH,FRU_GI_FRACTION, and RESERVED which are used to indicate the FRUconfiguration and the length of each frame type. The loop size is fixedso that four PHY profiles (including a FEF) are signaled within the FRU.If NUM_FRAME_FRU is less than 4, the unused fields are filled withzeros.

FRU_PHY_PROFILE: This 3-bit field indicates the PHY profile type of the(i+1)th (i is the loop index) frame of the associated FRU. This fielduses the same signaling format as shown in the table 8.

FRU_FRAME_LENGTH: This 2-bit field indicates the length of the (i+1)thframe of the associated FRU. Using FRU_FRAME_LENGTH together withFRU_GI_FRACTION, the exact value of the frame duration can be obtained.

FRU_GI_FRACTION: This 3-bit field indicates the guard interval fractionvalue of the (i+1)th frame of the associated FRU. FRU_GI_FRACTION issignaled according to the table 7.

RESERVED: This 4-bit field is reserved for future use.

The following fields provide parameters for decoding the PLS2 data.

PLS2_FEC_TYPE: This 2-bit field indicates the FEC type used by the PLS2protection. The FEC type is signaled according to table 10. The detailsof the LDPC codes will be described later.

TABLE 10 Contents PLS2 FEC type 00 4K-1/4 and 7K-3/10 LDPC codes 01~11Reserved

PLS2_MOD: This 3-bit field indicates the modulation type used by thePLS2. The modulation type is signaled according to table 11.

TABLE 11 Value PLS2_MODE 000 BPSK 001 QPSK 010 QAM-16 011 NUQ-64 100~111Reserved

PLS2_SIZE_CELL: This 15-bit field indicates Ctotal_partial_block, thesize (specified as the number of QAM cells) of the collection of fullcoded blocks for PLS2 that is carried in the current frame-group. Thisvalue is constant during the entire duration of the current frame-group.

PLS2_STAT_SIZE_BIT: This 14-bit field indicates the size, in bits, ofthe PLS2-STAT for the current frame-group. This value is constant duringthe entire duration of the current frame-group.

PLS2_DYN_SIZE_BIT: This 14-bit field indicates the size, in bits, of thePLS2-DYN for the current frame-group. This value is constant during theentire duration of the current frame-group.

PLS2_REP_FLAG: This 1-bit flag indicates whether the PLS2 repetitionmode is used in the current frame-group. When this field is set to value‘1’, the PLS2 repetition mode is activated. When this field is set tovalue ‘0’, the PLS2 repetition mode is deactivated.

PLS2_REP_SIZE_CELL: This 15-bit field indicates Ctotal_partial_block,the size (specified as the number of QAM cells) of the collection ofpartial coded blocks for PLS2 carried in every frame of the currentframe-group, when PLS2 repetition is used. If repetition is not used,the value of this field is equal to 0. This value is constant during theentire duration of the current frame-group.

PLS2_NEXT_FEC_TYPE: This 2-bit field indicates the FEC type used forPLS2 that is carried in every frame of the next frame-group. The FECtype is signaled according to the table 10.

PLS2_NEXT_MOD: This 3-bit field indicates the modulation type used forPLS2 that is carried in every frame of the next frame-group. Themodulation type is signaled according to the table 11.

PLS2_NEXT_REP_FLAG: This 1-bit flag indicates whether the PLS2repetition mode is used in the next frame-group. When this field is setto value ‘1’, the PLS2 repetition mode is activated. When this field isset to value ‘0’, the PLS2 repetition mode is deactivated.

PLS2_NEXT_REP_SIZE_CELL: This 15-bit field indicates Ctotal_full_block,The size (specified as the number of QAM cells) of the collection offull coded blocks for PLS2 that is carried in every frame of the nextframe-group, when PLS2 repetition is used. If repetition is not used inthe next frame-group, the value of this field is equal to 0. This valueis constant during the entire duration of the current frame-group.

PLS2_NEXT_REP_STAT_SIZE_BIT: This 14-bit field indicates the size, inbits, of the PLS2-STAT for the next frame-group. This value is constantin the current frame-group.

PLS2_NEXT_REP_DYN_SIZE_BIT: This 14-bit field indicates the size, inbits, of the PLS2-DYN for the next frame-group. This value is constantin the current frame-group.

PLS2_AP_MODE: This 2-bit field indicates whether additional parity isprovided for PLS2 in the current frame-group. This value is constantduring the entire duration of the current frame-group. The below table12 gives the values of this field. When this field is set to ‘00’,additional parity is not used for the PLS2 in the current frame-group.

TABLE 12 Value PLS2-AP mode 00 AP is not provided 01 AP1 mode 10~11Reserved

PLS2_AP_SIZE_CELL: This 15-bit field indicates the size (specified asthe number of QAM cells) of the additional parity bits of the PLS2. Thisvalue is constant during the entire duration of the current frame-group.

PLS2_NEXT_AP_MODE: This 2-bit field indicates whether additional parityis provided for PLS2 signaling in every frame of next frame-group. Thisvalue is constant during the entire duration of the current frame-group.The table 12 defines the values of this field

PLS2_NEXT_AP_SIZE_CELL: This 15-bit field indicates the size (specifiedas the number of QAM cells) of the additional parity bits of the PLS2 inevery frame of the next frame-group. This value is constant during theentire duration of the current frame-group.

RESERVED: This 32-bit field is reserved for future use.

CRC_32: A 32-bit error detection code, which is applied to the entirePLS1 signaling.

FIG. 14 illustrates PLS2 data according to an embodiment of the presentinvention.

FIG. 14 illustrates PLS2-STAT data of the PLS2 data. The PLS2-STAT dataare the same within a frame-group, while the PLS2-DYN data provideinformation that is specific for the current frame.

The details of fields of the PLS2-STAT data are as follows:

FIC_FLAG: This 1-bit field indicates whether the FIC is used in thecurrent frame-group. If this field is set to ‘1’, the FIC is provided inthe current frame. If this field set to ‘0’, the FIC is not carried inthe current frame. This value is constant during the entire duration ofthe current frame-group.

AUX_FLAG: This 1-bit field indicates whether the auxiliary stream(s) isused in the current frame-group. If this field is set to ‘1’, theauxiliary stream is provided in the current frame. If this field set to‘0’, the auxiliary stream is not carried in the current frame. Thisvalue is constant during the entire duration of current frame-group.

NUM_DP: This 6-bit field indicates the number of DPs carried within thecurrent frame. The value of this field ranges from 1 to 64, and thenumber of DPs is NUM_DP+1.

DP_ID: This 6-bit field identifies uniquely a DP within a PHY profile.

DP_TYPE: This 3-bit field indicates the type of the DP. This is signaledaccording to the below table 13.

TABLE 13 Value DP Type 000 DP Type 1 001 DP Type 2 010~111 reserved

DP_GROUP_ID: This 8-bit field identifies the DP group with which thecurrent DP is associated. This can be used by a receiver to access theDPs of the service components associated with a particular service,which will have the same DP_GROUP_ID.

BASE DP ID: This 6-bit field indicates the DP carrying service signalingdata (such as PSI/SI) used in the Management layer. The DP indicated byBASE_DP_ID may be either a normal DP carrying the service signaling dataalong with the service data or a dedicated DP carrying only the servicesignaling data

DP_FEC_TYPE: This 2-bit field indicates the FEC type used by theassociated DP. The FEC type is signaled according to the below table 14.

TABLE 14 Value FEC_TYPE 00 16K LDPC 01 64K LDPC 10~11 Reserved

DP_COD: This 4-bit field indicates the code rate used by the associatedDP. The code rate is signaled according to the below table 15.

TABLE 15 Value Code rate 0000 5/15 0001 6/15 0010 7/15 0011 8/15 01009/15 0101 10/15  0110 11/15  0111 12/15  1000 13/15  1001~1111 Reserved

DP_MOD: This 4-bit field indicates the modulation used by the associatedDP. The modulation is signaled according to the below table 16.

TABLE 16 Value Modulation 0000 QPSK 0001 QAM-16 0010 NUQ-64 0011 NUQ-2560100 NUQ-1024 0101 NUC-16 0110 NUC-64 0111 NUC-256 1000 NUC-10241001~1111 reserved

DP_SSD_FLAG: This 1-bit field indicates whether the SSD mode is used inthe associated DP. If this field is set to value ‘1’, SSD is used. Ifthis field is set to value ‘0’, SSD is not used.

The following field appears only if PHY_PROFILE is equal to ‘010’, whichindicates the advanced profile:

DP_MIMO: This 3-bit field indicates which type of MIND encoding processis applied to the associated DP. The type of MIMO encoding process issignaled according to the table 17.

TABLE 17 Value MIMO encoding 000 FR-SM 001 FRFD-SM 010~111 reserved

DP_TI_TYPE: This 1-bit field indicates the type of time-interleaving. Avalue of ‘0’ indicates that one TI group corresponds to one frame andcontains one or more TI-blocks. A value of ‘1’ indicates that one TIgroup is carried in more than one frame and contains only one TI-block.

DP_TI_LENGTH: The use of this 2-bit field (the allowed values are only1, 2, 4, 8) is determined by the values set within the DP_TI_TYPE fieldas follows:

If the DP_TI_TYPE is set to the value ‘1’, this field indicates PI, thenumber of the frames to which each TI group is mapped, and there is oneTI-block per TI group (NTI=1). The allowed PI values with 2-bit fieldare defined in the below table 18.

If the DP_TI_TYPE is set to the value ‘0’, this field indicates thenumber of TI-blocks NTI per TI group, and there is one TI group perframe (Pi=1). The allowed PI values with 2-bit field are defined in thebelow table 18.

TABLE 18 2-bit field PI NTI 00 1 1 01 2 2 10 4 3 11 8 4

DP_FRAME_INTERVAL: This 2-bit field indicates the frame interval (IJUMP)within the frame-group for the associated DP and the allowed values are1, 2, 4, 8 (the corresponding 2-bit field is ‘00’, ‘01’, ‘10’, or ‘11’,respectively). For DPs that do not appear every frame of theframe-group, the value of this field is equal to the interval betweensuccessive frames. For example, if a DP appears on the frames 1, 5, 9,13, etc., this field is set to ‘4’. For DPs that appear in every frame,this field is set to ‘1’.

DP_TI_BYPASS: This 1-bit field determines the availability of timeinterleaver 5050. If time interleaving is not used for a DP, it is setto ‘1’. Whereas if time interleaving is used it is set to ‘0’.

DP_FIRST_FRAME_IDX: This 5-bit field indicates the index of the firstframe of the super-frame in which the current DP occurs. The value ofDP_FIRST_FRAME_IDX ranges from 0 to 31

DP_NUM_BLOCK_MAX: This 10-bit field indicates the maximum value ofDP_NUM_BLOCKS for this DP. The value of this field has the same range asDP_NUM_BLOCKS.

DP_PAYLOAD_TYPE: This 2-bit field indicates the type of the payload datacarried by the given DP.

DP_PAYLOAD_TYPE is signaled according to the below table 19.

TABLE 19 Value Payload Type 00 TS. 01 IP 10 GS 11 reserved

DP_INBAND_MODE: This 2-bit field indicates whether the current DPcarries in-band signaling information. The in-band signaling type issignaled according to the below table 20.

TABLE 20 Value In-band mode 00 In-band signaling is not carried. 01INBAND-PLS is carried only 10 INBAND-ISSY is carried only 11 INBAND-PLSand INBAND-ISSY are carried

DP_PROTOCOL_TYPE: This 2-bit field indicates the protocol type of thepayload carried by the given DP. It is signaled according to the belowtable 21 when input payload types are selected.

TABLE 21 If If If DP_PAYLOAD_ DP_PAYLOAD_ DP_PAYLOAD_ TYPE TYPE TYPEValue Is TS Is IP Is GS 00 MPEG2-TS IPv4 (Note) 01 Reserved IPv6Reserved 10 Reserved Reserved Reserved 11 Reserved Reserved Reserved

DP_CRC_MODE: This 2-bit field indicates whether CRC encoding is used inthe Input Formatting block. The CRC mode is signaled according to thebelow table 22.

TABLE 22 Value CRC mode 00 Not used 01 CRC-8 10 CRC-16 11 CRC-32

DNP_MODE: This 2-bit field indicates the null-packet deletion mode usedby the associated DP when DP_PAYLOAD_TYPE is set to TS (‘00’). DNP_MODEis signaled according to the below table 23. If DP_PAYLOAD_TYPE is notTS (‘00’), DNP_MODE is set to the value ‘00’.

TABLE 23 Value Null-packet deletion mode 00 Not used 01 DNP-NORMAL 10DNP-OFFSET 11 reserved

ISSY_MODE: This 2-bit field indicates the ISSY mode used by theassociated DP when DP_PAYLOAD_TYPE is set to TS (‘00’). The ISSY_MODE issignaled according to the below table 24 If DP_PAYLOAD_TYPE is not TS(‘00’), ISSY_MODE is set to the value ‘00’.

TABLE 24 Value ISSY mode 00 Not used 01 ISSY-UP 10 ISSY-BBF 11 reserved

HC_MODE_TS: This 2-bit field indicates the TS header compression modeused by the associated DP when DP_PAYLOAD_TYPE is set to TS (‘00’). TheHC MODE TS is signaled according to the below table 25.

TABLE 25 Value Header compression mode 00 HC_MODE_TS 1 01 HC_MODE_TS 210 HC_MODE_TS 3 11 HC_MODE_TS 4

HC_MODE_IP: This 2-bit field indicates the IP header compression modewhen DP_PAYLOAD_TYPE is set to IP (‘01’). The HC_MODE_IP is signaledaccording to the below table 26.

TABLE 26 Value Header compression mode 00 No compression 01 HC_MODE_IP 110~11 reserved

PID: This 13-bit field indicates the PID number for TS headercompression when DP_PAYLOAD_TYPE is set to TS (‘00’) and HC_MODE_TS isset to ‘01’ or ‘10’.

RESERVED: This 8-bit field is reserved for future use.

The following field appears only if FIC_FLAG is equal to ‘1’:

FIC_VERSION: This 8-bit field indicates the version number of the FIC.

FIC_LENGTH_BYTE: This 13-bit field indicates the length, in bytes, ofthe FIC.

RESERVED: This 8-bit field is reserved for future use.

The following field appears only if AUX_FLAG is equal to ‘1’:

NUM_AUX: This 4-bit field indicates the number of auxiliary streams.Zero means no auxiliary streams are used.

AUX_CONFIG_RFU: This 8-bit field is reserved for future use.

AUX_STREAM_TYPE: This 4-bit is reserved for future use for indicatingthe type of the current auxiliary stream.

AUX_PRIVATE_CONFIG: This 28-bit field is reserved for future use forsignaling auxiliary streams.

FIG. 15 illustrates PLS2 data according to another embodiment of thepresent invention.

FIG. 15 illustrates PLS2-DYN data of the PLS2 data. The values of thePLS2-DYN data may change during the duration of one frame-group, whilethe size of fields remains constant.

The details of fields of the PLS2-DYN data are as follows:

FRAME_INDEX: This 5-bit field indicates the frame index of the currentframe within the super-frame. The index of the first frame of thesuper-frame is set to ‘0’.

PLS_CHANGE_COUNTER: This 4-bit field indicates the number ofsuper-frames ahead where the configuration will change. The nextsuper-frame with changes in the configuration is indicated by the valuesignaled within this field. If this field is set to the value ‘0000’, itmeans that no scheduled change is foreseen: e.g., value ‘1’ indicatesthat there is a change in the next super-frame.

FIC_CHANGE_COUNTER: This 4-bit field indicates the number ofsuper-frames ahead where the configuration (i.e., the contents of theFIC) will change. The next super-frame with changes in the configurationis indicated by the value signaled within this field. If this field isset to the value ‘0000’, it means that no scheduled change is foreseen:e.g. value ‘0001’ indicates that there is a change in the nextsuper-frame.

RESERVED: This 16-bit field is reserved for future use.

The following fields appear in the loop over NUM_DP, which describe theparameters associated with the DP carried in the current frame.

DP_ID: This 6-bit field indicates uniquely the DP within a PHY profile.

DP_START: This 15-bit (or 13-bit) field indicates the start position ofthe first of the DPs using the DPU addressing scheme. The DP_START fieldhas differing length according to the PHY profile and FFT size as shownin the below table 27.

TABLE 27 DP_START field size PHY profile 64K 16K Base 13 bits 15 bitsHandheld — 13 bits Advanced 13 bits 15 bits

DP_NUM_BLOCK: This 10-bit field indicates the number of FEC blocks inthe current TI group for the current DP.

The value of DP_NUM_BLOCK ranges from 0 to 1023

RESERVED: This 8-bit field is reserved for future use.

The following fields indicate the FIC parameters associated with theEAC.

EAC_FLAG: This 1-bit field indicates the existence of the EAC in thecurrent frame. This bit is the same value as the EAC_FLAG in thepreamble.

EAS_WAKE_UP_VERSION_NUM: This 8-bit field indicates the version numberof a wake-up indication.

If the EAC_FLAG field is equal to ‘1’, the following 12 bits areallocated for EAC_LENGTH_BYTE field. If the EAC_FLAG field is equal to‘0’, the following 12 bits are allocated for EAC_COUNTER.

EAC_LENGTH_BYTE: This 12-bit field indicates the length, in byte, of theEAC.

EAC_COUNTER: This 12-bit field indicates the number of the frames beforethe frame where the EAC arrives.

The following field appears only if the AUX_FLAG field is equal to ‘1’:

AUX_PRIVATE_DYN: This 48-bit field is reserved for future use forsignaling auxiliary streams. The meaning of this field depends on thevalue of AUX_STREAM_TYPE in the configurable PLS2-STAT.

CRC_32: A 32-bit error detection code, which is applied to the entirePLS2.

FIG. 16 illustrates a logical structure of a frame according to anembodiment of the present invention.

As above mentioned, the PLS, EAC, FIC, DPs, auxiliary streams and dummycells are mapped into the active carriers of the OFDM symbols in theframe. The PLS1 and PLS2 are first mapped into one or more FSS(s). Afterthat, EAC cells, if any, are mapped immediately following the PLS field,followed next by FIC cells, if any. The DPs are mapped next after thePLS or EAC, FIC, if any. Type 1 DPs follows first, and Type 2 DPs next.The details of a type of the DP will be described later. In some case,DPs may carry some special data for EAS or service signaling data. Theauxiliary stream or streams, if any, follow the DPs, which in turn arefollowed by dummy cells. Mapping them all together in the abovementioned order, i.e. PLS, EAC, FIC, DPs, auxiliary streams and dummydata cells exactly fill the cell capacity in the frame.

FIG. 17 illustrates PLS mapping according to an embodiment of thepresent invention.

PLS cells are mapped to the active carriers of FSS(s). Depending on thenumber of cells occupied by PLS, one or more symbols are designated asFSS(s), and the number of FSS(s) N_FSS is signaled by NUM_FSS in PLS1.The FSS is a special symbol for carrying PLS cells. Since robustness andlatency are critical issues in the PLS, the FSS(s) has higher density ofpilots allowing fast synchronization and frequency-only interpolationwithin the FSS.

PLS cells are mapped to active carriers of the NFSS FSS(s) in a top-downmanner as shown in an example in FIG. 17. The PLS1 cells are mappedfirst from the first cell of the first FSS in an increasing order of thecell index. The PLS2 cells follow immediately after the last cell of thePLS1 and mapping continues downward until the last cell index of thefirst FSS. If the total number of required PLS cells exceeds the numberof active carriers of one FSS, mapping proceeds to the next FSS andcontinues in exactly the same manner as the first FSS.

After PLS mapping is completed, DPs are carried next. If EAC, FIC orboth are present in the current frame, they are placed between PLS and“normal” DPs.

FIG. 18 illustrates EAC mapping according to an embodiment of thepresent invention.

EAC is a dedicated channel for carrying EAS messages and links to theDPs for EAS. EAS support is provided but EAC itself may or may not bepresent in every frame. EAC, if any, is mapped immediately after thePLS2 cells. EAC is not preceded by any of the FIC, DPs, auxiliarystreams or dummy cells other than the PLS cells. The procedure ofmapping the EAC cells is exactly the same as that of the PLS.

The EAC cells are mapped from the next cell of the PLS2 in increasingorder of the cell index as shown in the example in FIG. 18. Depending onthe EAS message size, EAC cells may occupy a few symbols, as shown inFIG. 18.

EAC cells follow immediately after the last cell of the PLS2, andmapping continues downward until the last cell index of the last FSS. Ifthe total number of required EAC cells exceeds the number of remainingactive carriers of the last FSS mapping proceeds to the next symbol andcontinues in exactly the same manner as FSS(s). The next symbol formapping in this case is the normal data symbol, which has more activecarriers than a FSS.

After EAC mapping is completed, the FIC is carried next, if any exists.If FIC is not transmitted (as signaled in the PLS2 field), DPs followimmediately after the last cell of the EAC.

FIG. 19 illustrates FIC mapping according to an embodiment of thepresent invention.

(a) shows an example mapping of FIC cell without EAC and (b) shows anexample mapping of FIC cell with EAC.

FIC is a dedicated channel for carrying cross-layer information toenable fast service acquisition and channel scanning. This informationprimarily includes channel binding information between DPs and theservices of each broadcaster. For fast scan, a receiver can decode FICand obtain information such as broadcaster ID, number of services, andBASE_DP_ID. For fast service acquisition, in addition to FIC, base DPcan be decoded using BASE_DP_ID. Other than the content it carries, abase DP is encoded and mapped to a frame in exactly the same way as anormal DP. Therefore, no additional description is required for a baseDP. The FIC data is generated and consumed in the Management Layer. Thecontent of FIC data is as described in the Management Layerspecification.

The FIC data is optional and the use of FIC is signaled by the FIC_FLAGparameter in the static part of the PLS2. If FIC is used, FIC_FLAG isset to ‘1’ and the signaling field for FIC is defined in the static partof PLS2. Signaled in this field are FIC_VERSION, and FIC_LENGTH_BYTE.FIC uses the same modulation, coding and time interleaving parameters asPLS2. FIC shares the same signaling parameters such as PLS2_MOD andPLS2_FEC. FIC data, if any, is mapped immediately after PLS2 or EAC ifany. FIC is not preceded by any normal DPs, auxiliary streams or dummycells. The method of mapping FIC cells is exactly the same as that ofEAC which is again the same as PLS.

Without EAC after PLS, FIC cells are mapped from the next cell of thePLS2 in an increasing order of the cell index as shown in an example in(a). Depending on the FIC data size, FIC cells may be mapped over a fewsymbols, as shown in (b).

FIC cells follow immediately after the last cell of the PLS2, andmapping continues downward until the last cell index of the last FSS. Ifthe total number of required FIC cells exceeds the number of remainingactive carriers of the last FSS, mapping proceeds to the next symbol andcontinues in exactly the same manner as FSS(s). The next symbol formapping in this case is the normal data symbol which has more activecarriers than a FSS.

If EAS messages are transmitted in the current frame, EAC precedes FIC,and FIC cells are mapped from the next cell of the EAC in an increasingorder of the cell index as shown in (b).

After FIC mapping is completed, one or more DPs are mapped, followed byauxiliary streams, if any, and dummy cells.

FIG. 20 illustrates a type of DP according to an embodiment of thepresent invention.

shows type 1 DP and (b) shows type 2 DP.

After the preceding channels, i.e., PLS, EAC and FIC, are mapped, cellsof the DPs are mapped. A DP is categorized into one of two typesaccording to mapping method:

Type 1 DP: DP is mapped by TDM

Type 2 DP: DP is mapped by FDM

The type of DP is indicated by DP_TYPE field in the static part of PLS2.FIG. 20 illustrates the mapping orders of Type 1 DPs and Type 2 DPs.Type 1 DPs are first mapped in the increasing order of cell index, andthen after reaching the last cell index, the symbol index is increasedby one. Within the next symbol, the DP continues to be mapped in theincreasing order of cell index starting from p=0. With a number of DPsmapped together in one frame, each of the Type 1 DPs are grouped intime, similar to TDM multiplexing of DPs.

Type 2 DPs are first mapped in the increasing order of symbol index, andthen after reaching the last OFDM symbol of the frame, the cell indexincreases by one and the symbol index rolls back to the first availablesymbol and then increases from that symbol index. After mapping a numberof DPs together in one frame, each of the Type 2 DPs are grouped infrequency together, similar to FDM multiplexing of DPs.

Type 1 DPs and Type 2 DPs can coexist in a frame if needed with onerestriction; Type 1 DPs always precede Type 2 DPs. The total number ofOFDM cells carrying Type 1 and Type 2 DPs cannot exceed the total numberof OFDM cells available for transmission of DPs:

D _(DP1) D _(DP2) ≦D _(DP)   [Equation 2]

where DDP1 is the number of OFDM cells occupied by Type 1 DPs, DDP2 isthe number of cells occupied by Type 2 DPs. Since PLS, EAC, FIC are allmapped in the same way as Type 1 DP, they all follow “Type 1 mappingrule”. Hence, overall, Type 1 mapping always precedes Type 2 mapping.

FIG. 21 illustrates DP mapping according to an embodiment of the presentinvention.

shows an addressing of OFDM cells for mapping type 1 DPs and (b) showsan addressing of OFDM cells for mapping for type 2 DPs.

Addressing of OFDM cells for mapping Type 1 DPs (0, . . . , DDP1-1) isdefined for the active data cells of Type 1 DPs. The addressing schemedefines the order in which the cells from the TIs for each of the Type 1DPs are allocated to the active data cells. It is also used to signalthe locations of the DPs in the dynamic part of the PLS2.

Without EAC and FIC, address 0 refers to the cell immediately followingthe last cell carrying PLS in the last FSS. If EAC is transmitted andFIC is not in the corresponding frame, address 0 refers to the cellimmediately following the last cell carrying EAC. If FIC is transmittedin the corresponding frame, address 0 refers to the cell immediatelyfollowing the last cell carrying FIC. Address 0 for Type 1 DPs can becalculated considering two different cases as shown in (a). In theexample in (a), PLS, EAC and FIC are assumed to be all transmitted.Extension to the cases where either or both of EAC and FIC are omittedis straightforward. If there are remaining cells in the FSS aftermapping all the cells up to FIC as shown on the left side of (a).

Addressing of OFDM cells for mapping Type 2 DPs (0, . . . , DDP2-1) isdefined for the active data cells of Type 2 DPs. The addressing schemedefines the order in which the cells from the TIs for each of the Type 2DPs are allocated to the active data cells. It is also used to signalthe locations of the DPs in the dynamic part of the PLS2.

Three slightly different cases are possible as shown in (b). For thefirst case shown on the left side of (b), cells in the last FSS areavailable for Type 2 DP mapping. For the second case shown in themiddle, FIC occupies cells of a normal symbol, but the number of FICcells on that symbol is not larger than CFSS. The third case, shown onthe right side in (b), is the same as the second case except that thenumber of FIC cells mapped on that symbol exceeds CFSS.

The extension to the case where Type 1 DP(s) precede Type 2 DP(s) isstraightforward since PLS, EAC and FIC follow the same “Type 1 mappingrule” as the Type 1 DP(s).

A data pipe unit (DPU) is a basic unit for allocating data cells to a DPin a frame.

A DPU is defined as a signaling unit for locating DPs in a frame. A CellMapper 7010 may map the cells produced by the TIs for each of the DPs. ATime interleaver 5050 outputs a series of TI-blocks and each TI-blockcomprises a variable number of XFECBLOCKs which is in turn composed of aset of cells. The number of cells in an XFECBLOCK, Ncells, is dependenton the FECBLOCK size, Nldpc, and the number of transmitted bits perconstellation symbol. A DPU is defined as the greatest common divisor ofall possible values of the number of cells in a XFECBLOCK, Ncells,supported in a given PHY profile. The length of a DPU in cells isdefined as LDPU. Since each PHY profile supports different combinationsof FECBLOCK size and a different number of bits per constellationsymbol, LDPU is defined on a PHY profile basis.

FIG. 22 illustrates an FEC structure according to an embodiment of thepresent invention.

FIG. 22 illustrates an FEC structure according to an embodiment of thepresent invention before bit interleaving. As above mentioned, Data FECencoder may perform the FEC encoding on the input BBF to generateFECBLOCK procedure using outer coding (BCH), and inner coding (LDPC).The illustrated FEC structure corresponds to the FECBLOCK. Also, theFECBLOCK and the FEC structure have same value corresponding to a lengthof LDPC codeword.

The BCH encoding is applied to each BBF (Kbch bits), and then LDPCencoding is applied to BCH-encoded BBF (Kldpc bits=Nbch bits) asillustrated in FIG. 22.

The value of Nldpc is either 64800 bits (long FECBLOCK) or 16200 bits(short FECBLOCK).

The below table 28 and table 29 show FEC encoding parameters for a longFECBLOCK and a short FECBLOCK, respectively.

TABLE 28 BCH error LDPC correction Nbch- Rate Nldpc Kldpc Kbchcapability Kbch  5/15 64800 21600 21408 12 192  6/15 25920 25728  7/1530240 30048  8/15 34560 34368  9/15 38880 38688 10/15 43200 43008 11/1547520 47328 12/15 51840 51648 13/15 56160 55968

TABLE 29 BCH error LDPC correction Nbch- Rate Nldpc Kldpc Kbchcapability Kbch  5/15 16200 5400 5232 12 168  6/15 6480 6312  7/15 75607392  8/15 8640 8472  9/15 9720 9552 10/15 10800 10632 11/15 11880 1171212/15 12960 12792 13/15 14040 13872

The details of operations of the BCH encoding and LDPC encoding are asfollows:

A 12-error correcting BCH code is used for outer encoding of the BBF.The BCH generator polynomial for short FECBLOCK and long FECBLOCK areobtained by multiplying together all polynomials.

LDPC code is used to encode the output of the outer BCH encoding. Togenerate a completed Bldpc (FECBLOCK), Pldpc (parity bits) is encodedsystematically from each Ildpc (BCH-encoded BBF), and appended to Ildpc.The completed Bldpc (FECBLOCK) are expressed as follow Equation.

B _(ldpc) =[I _(ldpc) P _(ldpc) ]=[i ₀ ,i ₁ , . . . , i _(K) _(ldpc) ⁻¹, p ₀ ,p ₁ , . . . , p _(N) _(ldpc) _(−K) _(ldpc) ⁻¹]  [Equation 3]

The parameters for long FECBLOCK and short FECBLOCK are given in theabove table 28 and 29, respectively.

The detailed procedure to calculate Nldpc−Kldpc parity bits for longFECBLOCK, is as follows:

1) Initialize the parity bits,

p ₀ =p ₁ =p ₂ = . . . =p _(N) _(ldpc) _(−K) _(ldpc) ⁻¹−0   [Equation 4]

2) Accumulate the first information bit—i0, at parity bit addressesspecified in the first row of an addresses of parity check matrix. Thedetails of addresses of parity check matrix will be described later. Forexample, for rate 13/15:

p₉₈₃=p₉₈₃⊕i₀ p₂₈₁₅=p₂₈₁₅⊕i₀

p₄₈₃₇=p₄₈₃₇⊕i₀ p₄₉₈₉=p₄₉₈₉⊕i₀

p₆₁₃₈=p₆₁₃₈⊕i₀ p₆₄₅₈=p₆₄₅₈⊕i₀

p₆₉₂₁=p₆₉₂₁⊕i₀ p₆₉₇₄=p₆₉₇₄⊕i₀

p₇₅₇₂=p₇₅₇₂⊕i₀ p₈₂₆₀=p₈₂₆₀⊕i₀

p₈₄₉₆=p₈₄₉₆⊕i₀   [Equation 5]

3) For the next 359 information bits, is, s=1, 2, . . . , 359 accumulateis at parity bit addresses using following Equation.

{x+(s mod 360)×Q_(ldpc)} mod(N_(ldpc)−K_(ldpc))   [Equation 6]

where x denotes the address of the parity bit accumulator correspondingto the first bit i0, and Qldpc is a code rate dependent constantspecified in the addresses of parity check matrix. Continuing with theexample, Qldpc=24 for rate 13/15, so for information bit i1, thefollowing operations are performed:

p₁₀₀₇=p₁₀₀₇⊕i₁ p₂₈₃₉=p²⁸³⁹⊕i₁

p₄₈₆₁=p₄₈₆₁⊕i₁ p₅₀₁₃=p₅₀₁₃⊕i₁

p₆₁₆₂=p₆₁₆₂⊕i₁ p₆₄₈₂=p₆₄₈₂⊕i₁

p₆₉₄₅=p₆₉₄₅⊕i₁ p₆₉₉₈=p₆₉₉₈⊕i₁

p₇₅₉₆=p₇₅₉₆⊕i₁ p₈₂₈₄−p₈₂₈₄⊕i₁

  [Equation 7]

4) For the 361st information bit i360, the addresses of the parity bitaccumulators are given in the second row of the addresses of paritycheck matrix. In a similar manner the addresses of the parity bitaccumulators for the following 359 information bits is, s=361, 362, . .. , 719 are obtained using the Equation 6, where x denotes the addressof the parity bit accumulator corresponding to the information bit i360,i.e., the entries in the second row of the addresses of parity checkmatrix.

5) In a similar manner, for every group of 360 new information bits, anew row from addresses of parity check matrixes used to find theaddresses of the parity bit accumulators.

After all of the information bits are exhausted, the final parity bitsare obtained as follows:

6) Sequentially perform the following operations starting with i=1

p _(i) =p _(i) ⊕p _(i−1) , i=1,2, . . . , N _(ldpc) −K _(ldpc)−1  [Equation 8]

where final content of pi, i=0,1, . . . Nldpc−Kldpc−1 is equal to theparity bit pi.

TABLE 30 Code Rate Qldpc  5/15 120  6/15 108  7/15 96  8/15 84  9/15 7210/15 60 11/15 48 12/15 36 13/15 24

This LDPC encoding procedure for a short FECBLOCK is in accordance witht LDPC encoding procedure for the long FECBLOCK, except replacing thetable 30 with table 31, and replacing the addresses of parity checkmatrix for the long FECBLOCK with the addresses of parity check matrixfor the short FECBLOCK.

TABLE 31 Code Rate Qldpc  5/15 30  6/15 27  7/15 24  8/15 21  9/15 1810/15 15 11/15 12 12/15 9 13/15 6

FIG. 23 illustrates a bit interleaving according to an embodiment of thepresent invention.

The outputs of the LDPC encoder are bit-interleaved, which consists ofparity interleaving followed by Quasi-Cyclic Block (QCB) interleavingand inner-group interleaving.

shows Quasi-Cyclic Block (QCB) interleaving and (b) shows inner-groupinterleaving.

The FECBLOCK may be parity interleaved. At the output of the parityinterleaving, the LDPC codeword consists of 180 adjacent QC blocks in along FECBLOCK and 45 adjacent QC blocks in a short FECBLOCK. Each QCblock in either a long or short FECBLOCK consists of 360 bits. Theparity interleaved LDPC codeword is interleaved by QCB interleaving. Theunit of QCB interleaving is a QC block. The QC blocks at the output ofparity interleaving are permutated by QCB interleaving as illustrated inFIG. 23, where Ncells=64800/ηmod or 16200/ηmod according to the FECBLOCKlength. The QCB interleaving pattern is unique to each combination ofmodulation type and LDPC code rate.

After QCB interleaving, inner-group interleaving is performed accordingto modulation type and order (ηmod) which is defined in the below table32. The number of QC blocks for one inner-group, NQCB_IG, is alsodefined.

TABLE 32 Modulation type ηmod NQCB_IG QAM-16 4 2 NUC-16 4 4 NUQ-64 6 3NUC-64 6 6 NUQ-256 8 4 NUC-256 8 8 NUQ-1024 10 5 NUC-1024 10 10

The inner-group interleaving process is performed with NQCBIG_QC blocksof the QCB interleaving output. Inner-group interleaving has a processof writing and reading the bits of the inner-group using 360 columns andNQCB_IG rows. In the write operation, the bits from the QCB interleavingoutput are written row-wise. The read operation is performed column-wiseto read out m bits from each row, where m is equal to 1 for NUC and 2for NUQ.

FIG. 24 illustrates a cell-word demultiplexing according to anembodiment of the present invention.

shows a cell-word demultiplexing for 8 and 12 bpcu MIMO and (b) shows acell-word demultiplexing for 10 bpcu MIMO.

Each cell word (c0, 1, c1, 1, . . . , cηmod-1,1) of the bit interleavingoutput is demultiplexed into (d1, 0, m, d1, 1, m . . . , d1, ηmod-1, m)and (d2, 0, m, d2, 1, m . . . , d2, ηmod-1,m) as shown in (a), whichdescribes the cell-word demultiplexing process for one XFECBLOCK.

For the 10 bpcu MIMO case using different types of NUQ for MIMOencoding, the Bit Interleaver for NUQ-1024 is re-used. Each cell word(c0, 1, c1, 1, . . . , c9, 1) of the Bit Interleaver output isdemultiplexed into (d1, 0, m, d1, 1, m . . . , d1, 3, m) and (d2, 0, m,d2, 1, m . . . , d2, 5, m), as shown in (b).

FIG. 25 illustrates a time interleaving according to an embodiment ofthe present invention.

(a) to (c) show examples of TI mode.

The time interleaver operates at the DP level. The parameters of timeinterleaving (TI) may be set differently for each DP.

The following parameters, which appear in part of the PLS2-STAT data,configure the TI:

DP_TI_TYPE (allowed values: 0 or 1): Represents the TI mode; ‘0’indicates the mode with multiple TI blocks (more than one TI block) perTI group. In this case, one TI group is directly mapped to one frame (nointer-frame interleaving). ‘1’ indicates the mode with only one TI blockper TI group. In this case, the TI block may be spread over more thanone frame (inter-frame interleaving).

DP_TI_LENGTH: If DP_TI_TYPE=‘0’, this parameter is the number of TIblocks NTI per TI group. For DP_TI_TYPE=‘1’, this parameter is thenumber of frames PI spread from one TI group.

DP_NUM_BLOCK_MAX (allowed values: 0 to 1023): Represents the maximumnumber of XFECBLOCKs per TI group.

DP_FRAME_INTERVAL (allowed values: 1, 2, 4, 8): Represents the number ofthe frames IJUMP between two successive frames carrying the same DP of agiven PHY profile.

DP_TI_BYPASS (allowed values: 0 or 1): If time interleaving is not usedfor a DP, this parameter is set to ‘1’. It is set to ‘0’ if timeinterleaving is used.

Additionally, the parameter DP_NUM_BLOCK from the PLS2-DYN data is usedto represent the number of XFECBLOCKs carried by one TI group of the DP.

When time interleaving is not used for a DP, the following TI group,time interleaving operation, and TI mode are not considered. However,the Delay Compensation block for the dynamic configuration informationfrom the scheduler will still be required. In each DP, the XFECBLOCKsreceived from the SSD/MIMO encoding are grouped into TI groups. That is,each TI group is a set of an integer number of XFECBLOCKs and willcontain a dynamically variable number of XFECBLOCKs. The number ofXFECBLOCKs in the TI group of index n is denoted by NxBLOCK_Group(n) andis signaled as DP_NUM_BLOCK in the PLS2-DYN data. Note thatNxBLOCK_Group(n) may vary from the minimum value of 0 to the maximumvalue NxBLOCK_Group_MAX (corresponding to DP_NUM_BLOCK_MAX) of which thelargest value is 1023.

Each TI group is either mapped directly onto one frame or spread over PIframes. Each TI group is also divided into more than one TI blocks(NTI), where each TI block corresponds to one usage of time interleavermemory. The TI blocks within the TI group may contain slightly differentnumbers of XFECBLOCKs. If the TI group is divided into multiple TIblocks, it is directly mapped to only one frame. There are three optionsfor time interleaving (except the extra option of skipping the timeinterleaving) as shown in the below table 33.

TABLE 33 Mode Description Option-1 Each TI group contains one TI blockand is mapped directly to one frame as shown in (a). This option issignaled in the PLS2-STAT by DP_TI_TYPE = ‘0’ and DP_TI_LENGTH = ‘1’(N_(TI) = 1). Option-2 Each TI group contains one TI block and is mappedto more than one frame. (b) shows an example, where one TI group ismapped to two frames, i.e., DP_TI_LENGTH = ‘2’ (P_(I) = 2) andDP_FRAME_INTERVAL (I_(JUMP) = 2). This provides greater time diversityfor low data-rate services. This option is signaled in the PLS2-STAT byDP_TI_TYPE = ‘1’. Option-3 Each TI group is divided into multiple TIblocks and is mapped directly to one frame as shown in (c). Each TIblock may use full TI memory, so as to provide the maximum bit-rate fora DP. This option is signaled in the PLS2-STAT signaling byDP_TI_TYPE-‘0’ and DP_TI_LENGTH = NTI, while P_(I) = 1.

In each DP, the TI memory stores the input XFECBLOCKs (output XFECBLOCKsfrom the SSD/MIMO encoding block). Assume that input XFECBLOCKs aredefined as

(d_(n,s,0,0),d_(n,s,0,1), . . . , d_(n,s,0,N) _(cells) ⁻¹,d_(n,s,1,N)_(cells) ⁻¹, . . . , d_(n,s,N) _(xBLOCK—TI) _((n,s)−1,0), . . . ,d_(n,s,N) _(xBLOCK—TI) _((n,s)−1,N) _(cells) ⁻¹),

where d_(n,s,r,q) is the qth cell of the rth XFECBLOCK in the sth TIblock of the nth TI group and represents the outputs of SSD and MIMOencodings as follows

$d_{n,s,r,q} = \left\{ \begin{matrix}{f_{n,s,r,q},} & {{the}\mspace{14mu} {output}\mspace{14mu} {of}\mspace{14mu} {SSD}\mspace{11mu} \ldots \mspace{14mu} {encoding}} \\{g_{n,s,r,q},} & {{the}\mspace{14mu} {output}\mspace{14mu} {of}\mspace{14mu} {MIMO}\mspace{14mu} {{encoding}.}}\end{matrix} \right.$

In addition, assume that output XFECBLOCKs from the time interleaver5050 are defined as

(h_(n,s,0),h_(n,s,1), . . . , h_(n,s,i), . . . , h_(n,s,N) _(xBLOCK—TI)_((n,s)×N) _(cells) ⁻¹),

where h_(n,s,i) is the ith output cell (for i=0, . . . , N_(xBLOCK) _(_)_(TI)(n,s)×N_(cells)−1) in the sth TI block of the nth TI group.

Typically, the time interleaver will also act as a buffer for DP dataprior to the process of frame building. This is achieved by means of twomemory banks for each DP. The first TI-block is written to the firstbank. The second TI-block is written to the second bank while the firstbank is being read from and so on.

The TI is a twisted row-column block interleaver. For the sth TI blockof the nth TI group, the number of rows N_(r) of a TI memory is equal tothe number of cells N_(cells), i.e., N_(r)=N_(cells) while the number ofcolumns N_(c) is equal to the number N_(xBLOCK) _(_) _(TI)(n,s).

FIG. 26 illustrates a basic operation of a twisted row-column blockinterleaver according to an exemplary embodiment of the presentinvention.

FIG. 26A illustrates a writing operation in a time interleaver and FIG.26B illustrates a reading operation in the time interleaver. Asillustrated in FIG. 26A, a first XFECBLOCK is written in a first columnof a time interleaving memory in a column direction and a secondXFECBLOCK is written in a next column, and such an operation iscontinued. In addition, in an interleaving array, a cell is read in adiagonal direction. As illustrated in FIG. 26B, while the diagonalreading is in progress from a first row (to a right side along the rowstarting from a leftmost column) to a last row, N_(r) cells are read. Indetail, when it is assumed that z_(n,s,i)(i=0, . . . , N_(r)N_(c)) is atime interleaving memory cell position to be sequentially read, thereading operation in the interleaving array is executed by calculating arow index R_(n,s,i), a column index C_(n,s,i), and associated twistparameter T_(n,s,i) as shown in an equation given below.

$\begin{matrix}{{{GENERATE}\left( {R_{n,s,i},C_{n,s,i}} \right)} = \left\{ {{R_{n,s,i} = {{mod}\left( {i,N_{r}} \right)}},{T_{n,s,i} = {{mod}\left( {{S_{shift} \times R_{n,s,i}},N_{c}} \right)}},{C_{n,s,i} = {{mod}\left( {{T_{n,s,i} + \left\lfloor \frac{i}{N_{r}} \right\rfloor},N_{c}} \right)}}} \right\}} & \left\lbrack {{Equation}\mspace{14mu} 9} \right\rbrack\end{matrix}$

Where, S_(shift) is a common shift value for a diagonal reading processregardless of N_(xBLOCK TI)(n,s) and the shift value is decided byN_(xBLOCK TI MAX) given in PLS2-STAT as shown in an equation givenbelow.

$\begin{matrix}{{for}\mspace{14mu} \left\{ {{\begin{matrix}{{N_{{xBLOCK}\; \_ \; {TI}\; \_ \; {MAX}}^{\prime} = {N_{{xBLOCK}\; \_ \; {TI}\; \_ \; {MAX}} + 1}},} & {{{if}\mspace{14mu} N_{{xBLOCK}\; \_ \; {TI}\; \_ \; {MAX}}\; {mod}\mspace{11mu} 2} = 0} \\{{N_{{xBLOCK}\; \_ \; {TI}\; \_ \; {MAX}}^{\prime} = N_{{xBLOCK}\; \_ \; {TI}\; \_ \; {MAX}}},} & {{{{if}\mspace{14mu} N_{{xBLOCK}\; \_ \; {TI}\; \_ \; {MAX}}{mod}\mspace{11mu} 2} = 1},}\end{matrix}\mspace{20mu} S_{shift}} = \frac{N_{{xBLOCK}\; \_ \; {TI}\; \_ \; {MAX}}^{\prime \;} - 1}{2}} \right.} & \left\lbrack {{Equation}\mspace{14mu} 10} \right\rbrack\end{matrix}$

Consequently, the cell position to be read is calculated by a coordinatez_(n,s,i)=N_(r)C_(n,s i)+R_(n s i).

FIG. 27 illustrates an operation of a twisted row-column blockinterleaver according to another exemplary embodiment of the presentinvention.

In more detail, FIG. 27 illustrates an interleaving array in the timeinterleaving memory for respective time interleaving groups including avirtual XFECBLOCK when N_(xBLOCK) _(_) _(TI)(0,0)=3,N_(xBLOCK TI)(1,0)=6, and N_(xBLOCK TI)(2,0)=5.

A variable N_(xBLOCK TI)(n,s)=N, will be equal to or smaller thanN′_(xBLOCK) _(_) _(TI) _(_) _(MAX). Accordingly, in order for a receiverto achieve single memory interleaving regardless of N_(xBLOCK) _(_)_(TI)(n,s), the size of the interleaving array for the twistedrow-column block interleaver is set to a size ofN_(r)×N_(c)=N_(cells)×N′_(xBLOCK) _(_) _(TI) _(_) _(MAX) by insertingthe virtual XFECBLOCK into the time interleaving memory and a readingprocess is achieved as shown in an equation given below.

$\begin{matrix}{\mspace{79mu} {{{p = 0};}\mspace{20mu} {{{{for}\mspace{14mu} i} = 0};}\mspace{20mu} {{i < {N_{cells}N_{{xBLOCK}\; \_ \; {TI}\; \_ \; {MAX}}^{\prime}}};}\mspace{20mu} {i = {i + 1}}\mspace{20mu} \left\{ {{{GENERATE}\mspace{11mu} \left( {R_{n,s,i},C_{n,s,i}} \right)};\mspace{20mu} {V_{i} = {{{N_{r}C_{n,s,j}} + {R_{n,s,j}\mspace{40mu} {if}\mspace{14mu} V_{i}}} < {N_{cells}{N_{xBLOCK\_ TI}\left( {n,s} \right)}\mspace{40mu} \left\{ \mspace{40mu} {{Z_{n,s,p} = V_{i}};\mspace{40mu} {p = {p + 1}};}\mspace{40mu} \right\}}}}} \right\}}} & \left\lbrack {{Equation}\mspace{14mu} 11} \right\rbrack\end{matrix}$

The number of the time interleaving groups is set to 3. An option of thetime interleaver is signaled in the PLS2-STAT by DP_TI_TYPE=‘0’,DP_FRAME_INTERVAL=‘1’, and DP_TI_LENGTH=‘1’, that is, NTI=1, IJUMP=1,and PI=1. The number of respective XFECBLOCKs per time interleavinggroup, of which Ncells=30 is signaled in PLS2-DYN data byNxBLOCK_TI(0,0)=3, NxBLOCK_TI(1,0)=6, and NxBLOCK_TI(2,0)=5 of therespective XFECBLOCKs. The maximum number of XFECBLOCKs is signaled inthe PLS2-STAT data by NxBLOCK_Group_MAX and this is continued to└N_(xBLOCK) _(_) _(Group) _(_) _(MAX)/N_(TI)┘=N_(xBLOCK) _(_) _(TI) _(_)_(MAX)=6.

FIG. 28 illustrates a diagonal reading pattern of the twisted row-columnblock interleaver according to the exemplary embodiment of the presentinvention.

In more detail, FIG. 28 illustrates a diagonal reading pattern fromrespective interleaving arrays having parameters N′_(xBLOCK TI MAX)=7and Sshift=(7−1)/2=3. In this case, during a reading process expressedby a pseudo code given above, when V_(i)≧N_(cells)N_(xBLOCK) _(_)_(TI)(n,s), a value of Vi is omitted and a next calculation value of Viis used.

FIG. 29 illustrates XFECBLOCK interleaved from each interleaving arrayaccording to an exemplary embodiment of the present invention.

FIG. 29 illustrates XFECBLOCK interleaved from each interleaving arrayhaving parameters N′_(xBLOCK) _(_) _(TI) _(_) _(MAX)=7 and Sshift=3according to an exemplary embodiment of the present invention.

In what follows, a method for processing signaling information includedin a broadcast signal will be described.

As shown in FIG. 1, the signaling generation block 1040 generatesphysical layer signaling information, and generated signalinginformation can be transmitted via the BICM unit 1010, frame buildingunit 1020, and OFDM generation unit 1030. The BICM block processingsignaling information may be operated as illustrated in FIGS. 2 and 6.In what follows, operation of a broadcast signal transmitter and abroadcast signal receiver which process signaling information will befurther described in more detail.

In this specification, PLS1 information may be called L1-staticinformation, and PLS2 information may be called L1-dynamic information.In other words, signaling information includes information forconfiguring physical layer parameters, L1 static information with afixed length, and L1 dynamic information with a variable length. Also, adata pipe may be called a Physical Layer Pipe (PLP).

FIG. 30 illustrates building blocks of a broadcast signal transmitterfor processing signaling information according to one embodiment of thepresent invention.

As shown in FIG. 30, a broadcast signal transmitter can comprise a PLSgeneration unit 30010, a PLS scrambler 30020, an FEC encoder 30030(shortened/punctured FEC encoder), a bit interleaver 30040, and aconstellation mapper 30050. In case the signaling information to beprocessed is PLS1, the broadcast signal transmitter uses a first PLSscrambler 30020-1, a first FEC encoder 30020-1, a first bit interleaver30040-1, and a first constellation mapper 30050-1, while, in case thesignaling information to be processed is PLS2, the broadcast signaltransmitter uses a second PLS scrambler 30020-2, a second FEC encoder30030-2, a second bit interleaver 30040-2, and a second constellationmapper 30050-2.

FIG. 30 shows the block for processing signaling information asillustrated in FIGS. 1 and 2, and the data processed by the processingblocks of FIG. 30 can be transmitted via the frame building unit 1020and the OFDM generation unit 1030.

The PLS1 and PLS2 generated by the PLS generation unit can be processedon the basis of FEC encoding units. The PLS1 has a fixed length and canprovide information by using a predetermined format within a superframe. The PLS1 can include information for decoding the PLS2. The PLS2may be divided into PLS2-static information of which the value does notchange frame to frame and PLS2-dynamic information of which the valuechanges. The PLS2 can include information required for decoding a datapipe which transmits a service. As described above, the PLS2-staticinformation or the PLS2-dynamic information may be called L1-dynamicinformation.

As shown in FIG. 30, the broadcast signal transmitter generatessignaling information by using the PLS generation unit 30010 andscrambles signaling information signaling information for datarandomization by using the PLS scrambler 30020. The operation of the bitinterleaver 30040 and the constellation mapper 30050 follows what isdescribed above. In one embodiment, the bit interleaver 30040 canperform block interleaving and bit demultiplexing, the constellationmapper 30050 can map the data received in bit units into QAM symbols,and QAM may use constellation ranging from BPSK to 256 QAM. Thescrambled signaling information can be encoded by FEC encoder units. Incase the bit interleaver performs block interleaving and bitdemultiplexing, the bit interleaver may be called a bit demultiplexer(demux).

As shown in FIG. 30, the FEC encoder 30030 can further comprise a BCHencoding/zero inserting unit 30060, an LDPC encoding unit 30070 (LDPCencoding/permutation), parity permutation unit 30080, and a paritypuncturing/zero removal unit 30090.

The BCH encoding/zero inserting unit 30060 can perform BCH encoding(shortened systematic BCH encoding) on signaling information and zeroinsertion/padding to fill up information bits of LDPC encoding.According to one embodiment, the broadcast signal transmitter mayperform permutation by taking into account the shortening order in caseprocessed data is PLS1, while, in the case of PLS2, the broadcast signaltransmitter may secure shortening performance through column permutationof the LDPC H matrix instead of carrying out the permutation.

The LDPC encoding unit 30070 can perform LDPC encoding on thezero-padded data. The LDPC encoding unit 30070 LDPC encodes K_ldpc LDPCinformation bits to output N_ldpc data, where (N_ldpc−K_ldpc) LDPCparity bits are added to the output data.

The parity permutation unit 30080 can perform parity interleaving on theLDPC encoded data, output data in units of QC blocks, and permutate thedata in units of QC blocks. The QC block may be called a bit group. Asdescribed above, the QC block can correspond to a bit group including360 bits. The parity permutation unit 30080 can output parityinterleaved signaling information by permutating the parity interleavedsignaling information in units of QC blocks (QCBs). If the QCB units areemployed, a receiver system can be easily implemented since the receivercan address parity data in units of QCBs. The parity permutation unit30080 may be called a parity interleaving/permutation unit 30080.

The parity puncturing/zero removal unit 30090 can perform puncturing onthe permutated LDPC parity bits, where punctured bits are nottransmitted to the frames which carry signaling information. The paritypuncturing/zero removal unit 30090 can remove zero padding bits. Theparity puncturing/zero removal unit 30090 can secure code length to betransmitted through parity puncturing and zero removal.

In what follows, the FEC encoder 30030 of FIG. 30 will be described inmore detail.

FIG. 31 illustrates an FEC encoding method according to one embodimentof the present invention.

FIG. 31 illustrates operation of the FEC encoder described withreference to FIG. 30 together with a data processing process.

The BCH encoding/zero inserting unit 30060 performs BCH encoding(shortening systematic BCH encoding) on signaling data. Also, the BCHencoding/zero inserting unit 30060 can perform zero insertion or zeropadding to fill up the information bits of the LDPC encoding, namely, tomake the size of the LDPC encoding data equal the size (K_ldpc) of LDPCinformation. As one embodiment, zero bit(s) may be inserted to the frontof the BCH data information.

The LDPC encoding unit 30070 can carry out LDPC encoding on thezero-padded signaling data. The LDPC encoding unit 30070 LDPC encodesK_ldpc LDPC information bits to output N_ldpc data, where(N_ldpc−K_ldpc) LDPC parity bits are added to the output data.

The parity permutation unit 30080 can perform parity interleaving on theLDPC encoded data to output data in units of QCBs. As shown in FIG. 31,parity interleaved data can be output in 360 bit groups ranging from a0-th parity group to a (Q_ldpc−1)-th parity group. And the paritypermutation unit 30080 can perform parity permutation in units of bitgroups according to a predetermined order as described above.

The parity puncturing/zero removal unit 30090 can perform puncturing onthe permutated LDPC parity bits, and the punctured bits are nottransmitted to the frames which carry signaling information. And theparity puncturing/zero removal unit 30080 can remove zero padding bits.Removal of zero bits can also be performed as described above.

The puncturing method can vary according to target performance of thesystem and a mother code employed. As an example, in case the FEC coderate is 3/15 and performance of −3dB is aimed, N_punc, which is thenumber of puncturing bits, can be determined by the equation below.

N_punc=floor(368/256×(K_bch−K_sig)+8060   [Equation 12]

K_sig represents the amount of scrambled data, and K_bch becomes3072(9*361-168).

Parity puncturing can be performed sequentially from the front part ofthe parity bits or sequentially in a reserve order from the rear part ofthe parity bits.

FIG. 32 illustrates an FEC encoding method according to one embodimentof the present invention.

FIG. 32 illustrates a data structure according to parity permutation,parity puncturing, and zero removal, in particular, after parityinterleaving in conjunction with FIGS. 30 and 31.

In FIG. 32, (a) represents the data to which parity interleaving hasbeen applied, (b) represents the data to which permutation in units ofQC have been applied, and (c) represents the data to which zero removaland puncturing have been applied.

FIG. 32(a) shows that the parity part of the data to which parityinterleaving has been applied is output in units of QCBs.

FIG. 32(b) illustrates that the order of the parity part of FIG. 32(a)has been changed through permutation. FIG. 32(b-1) illustrates apuncturing method by which parity puncturing is performed sequentiallyfrom the front part of permutated parity parts, while FIG. 32(b-2)illustrates a puncturing method by which parity puncturing is performedsequentially from the rear part of the permutated parity parts. In otherwords, in the case of FIG. 32(b-2), the permutation order is the reverseof the permutation order of FIG. 32(b-1). In case last N_punc bits arepunctured starting from the rear part as in FIG. 32(b-2), the overalltransceiver operation can be simplified. The broadcast signaltransmitter can perform permutation according to a puncturing method andin the case of FIG. 32, can perform permutation according to apuncturing order so that bits can be punctured starting from the rearpart.

FIG. 32(c) illustrates the data part transmitted to the next block afterzero removal and puncturing. As one embodiment, part of LDPC encodedsignaling information and punctured parity bits may be transmitted beingrepeated in the next PLS2 frame.

FIG. 33 illustrates a BCH encoding and zero padding method according toone embodiment of the present invention.

As shown in FIG. 33, the BCH encoder/zero inserting unit performs BCHencoding on K_sig PLS data segments to output N_BCH(N_BCH=K_sig+B_BCHParity) data. The length of BCH encoded data block,N_bch, can be smaller or equal to the LDPC encoder input length, K_ldpc.In case the length (N_BCH) of BCH encoding data is shorter than thelength (K_LDPC) of data for LDPC encoding, the broadcast signaltransmitter inserts as many zero bit(s) as the corresponding lengthdisparity (K_ldpc−N_bch) to perform LDPC encoding on the data with alength of K_ldpc. Since the padded zero bit(s) is not transmitted beingremoved after LDPC encoding, the padded zero bit(s) are used to generateshortened LDPC symbols. Shortening may refer to removal of inserted zerobits, a process of inserting zero bits and removing the zero bits afterLDPC encoding, or a process of inserting zero bits.

In view of performance taking account of characteristics of the LDPCsymbols, an order of priority exists for positions of padded zero bits,according to which shortening can be applied first or later. The presentinvention can define the order of priority by K_ldpc/QC size. In otherwords, the order of priority can be represented by group units obtainedby dividing the data to be LDPC encoded by the predetermined number ofbit groups (for example, 360). The QC size may correspond to theQuasi-Cyclic size of the LDPC matrix and may correspond to 360 bit sizeas in the embodiment described above.

As shown in FIG. 33, the broadcast signal transmitter can perform zeroinsertion subsequent to the BCH encoding by using the BCH encoder/zeroinserting unit.

As in FIG. 33, the broadcast signal transmitter can insert as many zerobits as the length of (K_ldpc−N_bch) to particular positions accordingto the LDPC shortening pattern order. In case (K_ldpc−N_bch) is not amultiple of the QC size, zero bit(s) can be inserted sequentially withinthe next QC size. In this way, the data of a BCH encoded block can besplit and inserted sequentially into the remaining positions except forthose positions into which zero bits have been inserted; and input tothe LDPC encoder.

In other words, as shown in FIG. 33, the broadcast signal transmittercan calculate the number of groups to be zero-padded by 360 bit groupunits. For example, if K_ldpc=3240 and K_bch=2000, the number of zerobits to be padded becomes 1240 (=3240−2000), and the number N_pad of bitgroups required for zero padding becomes 3 (since 1240=360*3+160).Therefore, according to the shortening pattern order, 160 zeros remainedafter applying zero padding to 3 bit groups can be used for applyingzero padding to the next bit group. And the BCH encoded bits (N_bch) canbe mapped sequentially to the bit positions to which zeros have not beenpadded.

FIG. 33 illustrates an embodiment where zero bits are padded to thefirst, third, sixth, eighth, and eleventh groups according to ashortening pattern order, remaining bits not enough to fill up one groupare padded to the tenth group, and BCH encoded bits are mappedsequentially to the remaining positions. In the embodiment of FIG. 33,zeros may be padded first to the front part of the tenth group and thelast BCH data part may be placed subsequently.

According to FIG. 33, the structure of the transceiver can be simplifiedand a data processing rate can be improved by padding zeros at the LDPCinput node and performing LDPC shortening without employing acomplicated process including the BCH encoding. Also, variable BCHoutput lengths can be applied to the fixed input of the LDPC encoder.

L1 signaling information includes information essential for decodingdata symbols transmitted within a frame. Therefore, decoding delay ofL1-FEC is of critical importance to the overall delay of broadcastsignal reception. The L1 signaling length required commonly for smallPLP is very short. However, in the case of the existing DVB-T2/NGH, a(large) BCH encoding/decoding time period with a fixed length is neededirrespective of the length of L1 signaling information. This is sobecause zeros are inserted blindly before BCH encoding to ensure theLDPC encoding length. The new structure according to the presentinvention provides such an advantage that BCH encoding/decoding timeperiod is reduced in proportion as the L1 signaling length (BCH inputlength) is shortened. (In the case of L1-free, the BCH codeword occupies7200 bits to perform 200-bit signaling according to an existing method;however, only 368-bit codeword is needed according to an embodiment ofthe present invention.)

FIG. 34 illustrates building blocks of a broadcast signal receiver forprocessing signaling information according to one embodiment of thepresent invention.

FIG. 34 describes the demapping/decoding unit and signaling decodingunit of FIG. 8 in more detail. The broadcast signal receiver demodulatesa received signal as illustrated in FIG. 9, performs frame parsing, anddecodes signaling information through the operation of FIG. 34.

As shown in FIG. 34, the broadcast signal receiver comprises aconstellation demapper 34010, a bit deinterleaver 34020, an FEC decoder34030 (shortened/punctured FEC decoder), a PLS descrambler 34040, and aPLS decoder 34050. The broadcast signal receiver can perform the inverseprocess of the signal processing method of the broadcast signaltransmitter.

In case the signaling information being processed corresponds to PLS1,the broadcast signal receiver can process the signaling information byusing a first constellation demapper 34010-1, a first bit deinterleaver34020-1, a first FEC decoder 34030-1, and a first PLS descrambler34040-1. In the case of PLS2, the broadcast signal receiver can processthe signaling information by using a second constellation demapper34010-2, a second bit deinterleaver 34020-2, a second FEC decoder34030-2, and a second PLS descrambler 34040-2. The constellationdemapper 34010 can perform constellation demapping on the data ofdemodulated symbol units. The output data of the constellation demapper34010, which are LLR values in bit units, can be soft values.

The bit deinterleaver 34020 can perform the inverse process of the bitinterleaver of FIG. 30. The bit deinterleaver 34020 performs bitdeinterleaving on received data. In other words, the bit deinterleaver34020 can perform bit multiplexing and block deinterleaving on thereceived signaling information, which in this case, the bitdeinterleaver 34020 may be called a bit multiplexer.

The FEC decoder 34030 can perform FEC decoding, namely, LDPC decodingand BCH decoding on the received data. The FEC decoder 34030 can furthercomprise three sub-units (zero insertion/parity insertion unit 34060,LDPC decoder 34070, and BCH decoder 34080), of which detailed operationswill be described below.

The PLS descrambler 34040 can descramble the received signalinginformation.

The PLS decoder 34050 can parse/decode signaling information andtransmit the decoded data to the system controller. And the systemcontroller can control signal reception and the overall processingoperation of the broadcast signal receiver according to the receivedsignaling information.

The zero insertion/parity insertion unit 34060 can insert zero bit(s)removed from the shortening operation of the transmitter side andpunctured parity bit(s). In this case, the zero insertion/parityinsertion unit 34060 inserts LLRs of infinite value to the positions ofzero bits to which the shortening operation has been applied and insertsLLRs of 0 value to the positions of punctured parity bits. Since thevalues of bits processed by the shortening operation are 0, positiveinfinite LLR values are inserted thereto; on the other hand, since thepunctured parity bits are obtained from decoding, LLR values of 0, whichcan be 0 or 1, are inserted to the punctured parity bits. As anembodiment, the broadcast signal receiver may perform initialization byinserting infinite LLR values to the information part and 0 LLR valuesto the parity bits; and for LDPC decoding, may insert bit deinterleaveroutputs directly to appropriate positions.

The LDPC decoder 34070 performs LDPC decoding. As an embodiment, thereceiver may LDPC decode signaling information by using an LDPC decoderfor data.

The BCH decoder 34080 can perform BCH decoding on the LDPC decoded data.The BCH decoder 34080 can perform BCH decoding by extracting the partfor BCH decoding from the output of the LDCP decoder 34070. In thiscase, the BCH decoder 34080 can remove inserted zero bits and performBCH decoding on the remaining BCH data after the zero removal.

FIG. 35 illustrates a method for processing signaling informationincluded in a broadcast signal of a broadcast signal transmitteraccording to one embodiment of the present invention.

The broadcast signal transmitter can scramble signaling informationgenerated from the signaling generation unit by using the scramblerS35010. The broadcast signal transmitter can FEC encode the scrambledsignaling information by using the FEC encoder S35020. The broadcastsignal transmitter can perform block interleaving and bit demultiplexingof the FEC encoded signaling information by using the bit interleaverS35030. And the broadcast signal transmitter can perform constellationmapping of the signaling information in bit units into datacells/symbols by using the constellation mapper S35040.

In particular, the FEC encoding S35020 of the broadcast signaltransmitter according to the present invention can further comprise BCHencoding signaling information by using the BCH encoding/zero insertingunit and inserting zero bits according to the length of BCH encodedsignaling information. In this case, the broadcast signal transmittercan pad as many zero bits as the difference when the length of BCHencoded data is shorter than the length of LDPC encoded input data.

The FEC encoding S35020 of the broadcast signal transmitter furthercomprise LDPC encoding signaling information by using the LDPC encodingunit, where LDPC parity bits are added to the LDPC encoded signalinginformation.

The FEC encoding S35020 of the broadcast signal transmitter can furthercomprise interleaving and permutating LDPC parity bits by using theparity permutation unit. The broadcast signal transmitter can splitinterleaved parity bits into at least one of bit group units and performpermutation on the split bit group units.

The FEC encoding S35020 of the broadcast signal transmitter can furthercomprise puncturing LDPC parity bits included in the signalinginformation and removing padded zero bits by using the paritypuncturing/zero removal unit. The broadcast signal transmitter maypuncture last N_punc parity bits among parity bits in permutated bitgroup units.

The broadcast signal transmitter can pad zero bits by bit group unitsaccording to a shortening pattern order and map/pad BCH encodedsignaling information sequentially into the bit positions which are notpadded with zero bits.

For a signaling information processing method of the broadcast signaltransmitter, the aforementioned method can be used in conjunction withthe drawings above.

FIG. 36 illustrates a method for processing signaling informationincluded in a broadcast signal of a broadcast signal receiver accordingto one embodiment of the present invention.

The broadcast signal receiver can perform symbol demapping on thesignaling information included in a received broadcast signal into LLRvalues by using the constellation demapper S36010. The broadcast signalreceiver can perform bit multiplexing and block interleaving on thesignaling information by using the bit deinterleaver S36020. Thebroadcast signal receiver can FEC decode the signaling information byusing the FEC decoder S36030. And the broadcast signal receiver candescramble the signaling information by using the descrambler S36040.

In particular, the FEC decoding S36030 of a method for processingsignaling information according to the present invention furthercomprises inserting shortened zero bits and punctured parity bits intothe signaling information by using the zero insertion and parityinsertion unit. In this case, the broadcast signal receiver inserts LLRsof infinite values as the zero bits and LLRs of zero values as theparity bits. Since the punctured parity bits corresponds to the lastN_punc parity bits which have been permutated and punctured as describedabove, the receiver can insert the punctured, last parity bits into therear part of the signaling information as zero LLR values.

Also, the signaling information included in a received broadcast signalis characterized such that the zero bits are padded in bit group unitsaccording to a shortening pattern order and the BCH encoded signalinginformation is mapped/padded sequentially into the bit positions whichare not padded with the zero bits. As described above, the zero bits arepadded to fill up the LDPC information bits in case the number of BCHencoded bits is smaller than the number of LDPC information bits, andthe signaling information is such kind of information received after thezero bits have been removed.

In a signaling information processing method of the broadcast signalreceiver, the method described above in conjunction with the drawings ofFIG. 1 to FIG. 35 can be used together in addition to the descriptionwith respect to FIG. 36.

The present invention is related to a signaling protection method byusing LDPC coding, and this document describes the whole protectionprocess ranging from scrambling to symbol mapping. In particular, zeroscan be disposed in the front part of a signal for applying LDPCencoding, or zero padding can be carried out according to a shorteningorder as shown in FIG. 33. In case zero bits are placed in the frontpart of a BCH encoded signal, complexity/delay of the encoder/decodercan be reduced by fully utilizing the characteristics of theshortened-BCH codes.

Shortening can reduce complexity in implementation, and secure optimizedshortening performance through column permutation of the H-matrix. Also,shortening may be performed sequentially.

Carrying out parity interleaving by taking into account complexity ofthe receiver, the receiver can carry out LDPC decoding in a QC form,namely, in bit group units.

For parity puncturing, parity permutation can be carried out on thebasis of QC units, and puncturing can be carried out from the front orrear part of the parity bits depending on the amount of puncturing.

By employing bit (block) interleaving and bit demultiplexing, reliablemapping can be carried out between the LDPC output and the QAM symbolsaccording to various signaling information lengths. And variousconstellations that are capable of signaling fitted to mobile, fixed, orhigh SNR services may be used.

Also, the present invention can perform LDPC shortening by padding zerosat the LDPC input node without undergoing the complex process of BCHencoding, thereby saving the burden of the BCH encoder, improving BCHencoding performance, and reducing system complexity. Also, through thismethod, varying BCH encoder output can be adapted to the fixed LDPCinput length.

The additional delay in signal processing can be reduced only if thereceiver is able to quickly decode signaling information. This is sobecause the BCH decoding latency generated from the receiver-sideincreases according to the sum of the size of BCH parity bits and thesize of zero padding bits. Therefore, as in the present invention, bycarrying out zero padding after BCH encoding, the BCH decoding latencyat the receiver can be significantly reduced.

It should be clearly understood by those skilled in the art that variousmodifications and changes of the present invention can be made withoutleaving the technical principles and scope of the present invention.Therefore, it should be understood that the present invention includesthe modifications and changes of the present invention supported by theappended claims and their equivalents.

This document describes all of the apparatus and methods related to thepresent invention, and descriptions thereof can be applied in acomplementary manner.

What is claimed is:
 1. A broadcast signal transmitter for processing abroadcast signal including signaling information, the broadcast signaltransmitter comprising a scrambler for scrambling the signalinginformation; a FEC(Forward Error Correction) encoder for FEC encodingthe signaling information; a bit demultiplexer for block interleavingand bit demultiplexing of the signaling information; and a constellationmapper for symbol mapping of the signaling information; wherein the FECencoder comprises a BCH encoding/zero inserting unit for BCH encodingthe signaling information and inserting zero bits based on length of theBCH encoded signaling information; an LDPC encoding unit for LDPCencoding the signaling information and adding parity bits; a paritypermutation unit for interleaving and permutating the parity bits of theLDPC encoded signaling information; and a parity puncturing/zero removalunit for puncturing the parity bits of the signaling information andremoving the zero bits of the signaling information.
 2. The broadcastsignal transmitter of claim 1, wherein the parity permutation unitsplits the interleaved parity bits into at least one bit group unit. 3.The broadcast signal transmitter of claim 2, wherein the paritypermutation unit permutates the parity bits by the bit group unit. 4.The broadcast signal transmitter of claim 1, wherein the paritypuncturing/zero removing unit punctures a predetermined number of lastparity bits of the parity bits.
 5. The broadcast signal transmitter ofclaim 1, wherein the BCH encoding/zero inserting unit pads the zero bitsaccording to a shortening pattern order and sequentially maps the BCHencoded signaling information to bit positions which are not padded withthe zero bits.
 6. The broadcast signal transmitter of claim 1, wherein,in case the number of the BCH encoded bits is smaller than the number ofLDPC encoded LDPC information bits, the BCH encoding/zero inserting unitpads the zero bits to fill up the LDPC information bits.
 7. Thebroadcast signal transmitter of claim 1, wherein the signalinginformation includes information for configuring physical layerparameters, L1 static information with a fixed length, and L1 dynamicinformation with a variable length.
 8. A method for transmitting abroadcast signal for processing a broadcast signal including signalinginformation, the method for transmitting a broadcast signal comprisingscrambling the signaling information; FEC encoding the signalinginformation; block interleaving and bit demultiplexing of the signalinginformation; and symbol mapping of the signaling information; whereinthe FEC encoding comprises BCH encoding the signaling information;inserting zero bits based on length of the BCH encoded signalinginformation; adding parity bits by LDPC encoding the signalinginformation; interleaving and permutating the parity bits of the LDPCencoded signaling information; and puncturing the parity bits of thesignaling information and removing zero bits of the signalinginformation.
 9. The method of claim 8, wherein the interleaved paritybits are split into at least one bit group unit.
 10. The method of claim9, wherein the parity bits split by the bit group unit are permutated inunits of the bit groups.
 11. The method of claim 8, wherein apredetermined number of last parity bits of the parity bits arepunctured.
 12. The method of claim 8, wherein the inserting zero bitspads the zero bits according to a shortening pattern order andsequentially maps the BCH encoded signaling information to bit positionswhich are not padded with the zero bits.
 13. The method of claim 8,wherein, in case the number of the BCH encoded bits is smaller than thenumber of LDPC encoded LDPC information bits, the inserting zero bitspads the zero bits to fill up the LDPC information bits.
 14. The methodof claim 8, wherein the signaling information includes information forconfiguring physical layer parameters, L1 static information with afixed length, and L1 dynamic information with a variable length.